Clock tool example use case: Configure eMIOS to 60 MHz PLL1 with MPC5777C_264MHz
MPC5777C Clock Calculator Guide, Rev. 1, 12/2018
NXP Semiconductors 27
Figure 37. CORE_CLK at 120 MHz PLL1
Follow CORE_CLK down to the Peripheral Clock Select block and make sure its value is 0, so that
CORE_CLK is selected.
Figure 38. CORE_CLK selected as peripheral clock source
Navigate down to PER_CLK and set its divider field to 0, which corresponds to a divide by 2. Hence
PER_CLK has been configured to 60 MHz.
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