Quectel EG25-G - Page 26

LTE Module Series
EG25-G Hardware Design
EG25-G_Hardware_Design 25 / 100
V
IH
max=3.34V
SD_INS_
DET
23
DI
SD card insertion
detect
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep it
open.
VDD_SDIO
34
PO
SD card SDIO bus
pull-up power
I
O
max=50mA
1.8V/2.85V
configurable.
Cannot be used for
SD card power.
If unused, keep it
open.
Wireless Connectivity Interfaces
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
WLAN_SLP_
CLK
118
DO
WLAN sleep clock
If unused, keep it
open.
PM_ENABLE
127
DO
WLAN power control
V
OL
max=0.45V
V
OH
min=1.35V
1.8V power domain.
Active high.
If unused, keep it
open.
SDC1_
DATA3
129
IO
WLAN SDIO data
bus D3
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep it
open.
SDC1_
DATA2
130
IO
WLAN SDIO data
bus D2
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep it
open.
SDC1_
DATA1
131
IO
WLAN SDIO data
bus D1
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
V
IH
min=1.2V
V
IH
max=2.0V
1.8V power domain.
If unused, keep it
open.
SDC1_
DATA0
132
IO
WLAN SDIO data
bus D0
V
OL
max=0.45V
V
OH
min=1.35V
V
IL
min=-0.3V
V
IL
max=0.6V
1.8V power domain.
If unused, keep it
open.