1
st
Edition 5-9
The IEEE P1386.1 standard defines four connectors with pin assignments shown in the following tables.
In the tables ‘J’ is the host board connector ID (PMC mating connectors have a ‘P’ prefix); the next digit
is ‘1’ for PMC site number 1 or ‘2’ for PMC site number 2, and the final number element defines the
four possible connectors.
Jx1 (32-bit PCI) Connector Pinout
Jx2 (32-bit PCI) Connector Pinout
PIN SIGNAL PIN SIGNAL PIN SIGNAL PIN SIGNAL
1 TCK1 2 -12V 1 +12V 2 TRST~
3 GND 4 IRQ 3 TMS 4 TDO
5 IRQ 6 IRQ 5 TDI 6 GND
7 BUSMODE1 8 +5V 7 GND 8 Reserved (PCI)
9 IRQ 10 Reserved (PCI) 9 Reserved (PCI) 10 Reserved (PCI)
11 GND 12 Reserved 11 BUSMODE2~ 12 3.3V
13 CLK0 14 GND 13 HARDRESET~ 14 BUSMODE3~
15 GND 16 GNT_A~ 15 3.3V 16 BUSMODE4~
17 REQ_A~ 18 +5V 17 Reserved 18 GND
19 VIO 20 AD(31) 19 AD(30) 20 AD(29)
21 AD(28) 22 AD(27) 21 GND 22 AD(26)
23 AD(25) 24 GND 23 AD(24) 24 3.3V
25 GND 26 CBE(3)~ 25 IDSEL_A 26 AD(23)
27 AD(22) 28 AD(21) 27 3.3V 28 AD(20)
29 AD(19) 30 +5V 29 AD(18) 30 GND
31 VIO 32 AD(17) 31 AD(16) 32 CBE(2)~
33 FRAME~ 34 GND 33 GND 34 IDSEL_B
35 GND 36 IRDY~ 35 TRDY~ 36 3.3V
37 DEVSEL~ 38 +5V 37 GND 38 STOP~
39 40 LOCK~ 39 PERR~ 40 GND
41 No Connection 42 No Connection 41 3.3V 42 SERR~
43 PAR 44 GND 43 CBE(1)~ 44 GND
45 VIO 46 AD(15) 45 AD(14) 46 AD(13)
47 AD(12) 48 AD(11) 47 M66EN 48 AD(10)
49 AD(9) 50 +5V 49 AD(8) 50 3.3V
51 GND 52 CBE(0)~ 51 AD(7) 52 REQ_B~
53 AD(6) 54 AD(5) 53 3.3V 54 GNT_B~
55 AD(4) 56 GND 55 Reserved (PMC) 56 GND
57 VIO 58 AD(3) 57 Reserved (PMC) 58 EREADY
59 AD(2) 60 AD(1) 59 GND 60 GND
61 AD(0) 62 +5V 61 ACK64~ 62 3.3V
63 GND 64 REQ64~ 63 GND 64 GND
IRQX~ on J11, IRQW~ on J21
IRQY~ on J11, IRQX~ on J21
IRQZ~ on J11, IRQY~ on J21
IRQW~ on J11, IRQz~ on J21
GND on J11, XCAP on J21
To Next Page
Loading...