ROHS MC9S08QE128 - Page 12

MC9S08QE128 MCU Series Reference Manual, Rev. 2
Freescale Semiconductor 13
Section Number Title Page
Chapter 10
Analog-to-Digital Converter (S08ADC12V1)
10.1 Introduction ...................................................................................................................................175
10.1.1 ADC Clock Gating ..........................................................................................................175
10.1.2 Module Configurations ...................................................................................................177
10.1.3 Features ...........................................................................................................................179
10.1.4 Block Diagram ................................................................................................................179
10.2 External Signal Description ..........................................................................................................180
10.2.1 Analog Power (V
DDAD
) ..................................................................................................181
10.2.2 Analog Ground (V
SSAD
) .................................................................................................181
10.2.3 Voltage Reference High (V
REFH
) ...................................................................................181
10.2.4 Voltage Reference Low (V
REFL
) .....................................................................................181
10.2.5 Analog Channel Inputs (ADx) ........................................................................................181
10.3 Register Definition ........................................................................................................................181
10.3.1 Status and Control Register 1 (ADCSC1) ......................................................................181
10.3.2 Status and Control Register 2 (ADCSC2) ......................................................................183
10.3.3 Data Result High Register (ADCRH) .............................................................................184
10.3.4 Data Result Low Register (ADCRL) ..............................................................................184
10.3.5 Compare Value High Register (ADCCVH) ....................................................................185
10.3.6 Compare Value Low Register (ADCCVL) .....................................................................185
10.3.7 Configuration Register (ADCCFG) ................................................................................185
10.3.8 Pin Control 1 Register (APCTL1) ..................................................................................187
10.3.9 Pin Control 2 Register (APCTL2) ..................................................................................188
10.3.10Pin Control 3 Register (APCTL3) ..................................................................................189
10.4 Functional Description ..................................................................................................................190
10.4.1 Clock Select and Divide Control ....................................................................................190
10.4.2 Input Select and Pin Control ...........................................................................................191
10.4.3 Hardware Trigger ............................................................................................................191
10.4.4 Conversion Control .........................................................................................................191
10.4.5 Automatic Compare Function .........................................................................................194
10.4.6 MCU Wait Mode Operation ............................................................................................194
10.4.7 MCU Stop3 Mode Operation ..........................................................................................194
10.4.8 MCU Stop1 and Stop2 Mode Operation .........................................................................195
10.5 Initialization Information ..............................................................................................................195
10.5.1 ADC Module Initialization Example .............................................................................195
10.6 Application Information ................................................................................................................197
10.6.1 External Pins and Routing ..............................................................................................197
10.6.2 Sources of Error ..............................................................................................................199