ROHS MC9S08QE128 - Page 13

MC9S08QE128 MCU Series Reference Manual, Rev. 2
14 Freescale Semiconductor
Section Number Title Page
Chapter 11
Internal Clock Source (S08ICSV3)
11.1 Introduction ...................................................................................................................................203
11.1.1 External Oscillator ..........................................................................................................203
11.1.2 Stop2 Mode Considerations ............................................................................................203
11.1.3 Features ...........................................................................................................................205
11.1.4 Block Diagram ................................................................................................................205
11.1.5 Modes of Operation ........................................................................................................206
11.2 External Signal Description ..........................................................................................................207
11.3 Register Definition ........................................................................................................................207
11.3.1 ICS Control Register 1 (ICSC1) .....................................................................................208
11.3.2 ICS Control Register 2 (ICSC2) .....................................................................................209
11.3.3 ICS Trim Register (ICSTRM) .........................................................................................209
11.3.4 ICS Status and Control (ICSSC) .....................................................................................210
11.4 Functional Description ..................................................................................................................212
11.4.1 Operational Modes ..........................................................................................................212
11.4.2 Mode Switching ..............................................................................................................214
11.4.3 Bus Frequency Divider ...................................................................................................215
11.4.4 Low Power Bit Usage .....................................................................................................215
11.4.5 DCO Maximum Frequency with 32.768 kHz Oscillator ................................................215
11.4.6 Internal Reference Clock ................................................................................................215
11.4.7 External Reference Clock ...............................................................................................216
11.4.8 Fixed Frequency Clock ...................................................................................................216
11.4.9 Local Clock .....................................................................................................................216
Chapter 12
Inter-Integrated Circuit (S08IICV2)
12.1 Introduction ...................................................................................................................................217
12.1.1 Module Configuration .....................................................................................................217
12.1.2 Interrupt Vectors ..............................................................................................................217
12.1.3 Features ...........................................................................................................................219
12.1.4 Modes of Operation ........................................................................................................219
12.1.5 Block Diagram ................................................................................................................220
12.2 External Signal Description ..........................................................................................................220
12.2.1 SCL — Serial Clock Line ...............................................................................................220
12.2.2 SDA — Serial Data Line ................................................................................................220
12.3 Register Definition ........................................................................................................................221
12.3.1 IIC Address Register (IICxA) .........................................................................................221
12.3.2 IIC Frequency Divider Register (IICxF) .........................................................................222
12.3.3 IIC Control Register (IICxC1) ........................................................................................224
12.3.4 IIC Status Register (IICxS) .............................................................................................225
12.3.5 IIC Data I/O Register (IICxD) ........................................................................................226