Fail-safe signal modules 
Installation and Operating Manual, 01/2010, A5E00085586-10 
31 
Addressing and installation 
4
4.1  Address Assignments in the CPU 
Address assignment in standard and safety mode  
The fail-safe signal modules occupy the following address ranges in the CPU/F-CPU: 
●  In standard mode: The full I/O area (within and outside the process image) 
●  In safety mode for 
S7 Distributed Safety
 and for 
S7 F/FH Systems
 in the area of the 
process image 
Table 4- 1  Address assignment in standard and safety mode 
Bytes occupied in the CPU: 
Module 
In the input area  In the output area 
SM 326; DI 24 x DC 24 V  x + 0 to x + 9  x + 0 to x + 3 
SM 326; DI 8 x NAMUR  x + 0 to x + 5  x + 0 to x + 3 
SM 326; DO 8 x DC 24V/2A PM  x + 0 to x + 4  x + 0 to x + 4 
SM 326; DO 10 x DC 24V/2A  x + 0 to x + 5  x + 0 to x + 7 
SM 326; F-DO 10 x DC 24V/2A PP  x + 0 to x + 5  x + 0 to x + 7 
SM 336; AI 6 x 13Bit  x + 0 to x + 15  x + 0 to x + 3 
SM 336; F-AI 6 x 0/4 ... 20 mA HART  x + 0 to x + 15  x + 0 to x + 3 
x = module start address  
Address assignment of user data  
Of the assigned addresses in standard and safety mode of the F-SMs, the user data occupy 
the following addresses in the CPU/F-CPU.  
Table 4- 2  Address assignment of user data 
Assigned bits in the CPU for each module: 
Bytes in the CPU 
7  6  5  4  3  2  1  0 
SM 326; DI 24 x DC 24 V: 
x + 0  Channel 7  Channel 6  Channel 5 Channel 4 Channel 3 Channel 2  Channel 1 Channel 0
x + 1  Channel 
15 
Channel 
14 
Channel 
13 
Channel 
12 
Channel 
11 
Channel 
10 
Channel 9 Channel 8
x + 2  Channel 
23 
Channel 
22 
Channel 
21 
Channel 
20 
Channel 
19 
Channel 
18 
Channel 
17 
Channel 
16 
SM 326; DI 8 x NAMUR: 
x + 0  Channel 7  Channel 6  Channel 5 Channel 4 Channel 3 Channel 2  Channel 1 Channel 0