Siemens SIMATIC S7-300 CPU Data: CPU 315-T-2 DP

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Table of contents

6.1.4 Address areas of system memory ............................................................................................. 6-4

6.1.5 Properties of the Micro Memory Card (MMC)............................................................................ 6-7

6.1.6 Saving/retrieving whole projects to/from the Micro Memory Card ............................................. 6-8

6.2 Memory functions..................................................................................................................... 6-10

6.2.1 Downloading the user program................................................................................................ 6-10

6.2.2 Downloading a user program (enhanced handling)................................................................. 6-11

6.2.3 CPU memory reset and restart ................................................................................................ 6-12

6.3 Recipes .................................................................................................................................... 6-13

6.4 Measured value log files .......................................................................................................... 6-15

6.5 Technology data blocks ........................................................................................................... 6-17

6.6 Memory of the integrated technology of the CPU.................................................................... 6-17

7 Cycle and response times....................................................................................................................... 7-1

7.1 Overview .................................................................................................................................... 7-1

7.2 Cycle time................................................................................................................................... 7-2

7.2.1 Overview .................................................................................................................................... 7-2

7.2.2 Calculating the cycle time .......................................................................................................... 7-4

7.2.3 Different cycle times................................................................................................................... 7-5

7.2.4 Communication Load ................................................................................................................. 7-6

7.2.5 Cycle time extension as a result of testing and commissioning functions ................................. 7-8

7.3 Response time ........................................................................................................................... 7-8

7.3.1 Overview .................................................................................................................................... 7-8

7.3.2 Shortest response time ............................................................................................................ 7-10

7.3.3 Longest response time............................................................................................................. 7-11

7.3.4 Reducing the response time with direct I/O access................................................................. 7-13

7.4 Calculating method for calculating the cycle/response time.................................................... 7-13

7.5 Interrupt response time ............................................................................................................ 7-14

7.5.1 Overview .................................................................................................................................. 7-14

7.5.2 Reproducibility of Time-Delay and Watchdog Interrupts ......................................................... 7-16

7.6 Sample calculations ................................................................................................................. 7-16

7.6.1 Calculation example for the cycle time of the CPU 315T-2 DP ............................................... 7-16

7.6.2 Calculation example for the response time of the CPU 315T-2 DP ........................................ 7-17

7.6.3 Calculation example for the interrupt response time of the CPU 315T-2 DP .......................... 7-19

8 Technical data ........................................................................................................................................ 8-1

8.1 General technical data ............................................................................................................... 8-1

8.1.1 Dimension drawing..................................................................................................................... 8-1

8.1.2 Technical specifications of the Micro Memory Card (MMC) ...................................................... 8-2

8.1.3 Clock .......................................................................................................................................... 8-2

8.2 CPU 315T-2 DP ......................................................................................................................... 8-3

8.3 Integrated Inputs/Outputs for Technology.................................................................................. 8-9

8.3.1 Arrangement of integrated inputs/outputs for integrated technology......................................... 8-9

8.3.2 Technical specifications of digital inputs.................................................................................. 8-10

8.3.3 Technical specifications of digital outputs................................................................................ 8-12

9 Information for the Changeover to the Technology CPU......................................................................... 9-1

9.1 Scope ......................................................................................................................................... 9-1

9.2 Changed behavior of certain SFCs............................................................................................ 9-2

9.3 Interrupt events from distributed I/Os while the CPU status is in STOP.................................... 9-3

S7-300 CPU Data: CPU 315T-2 DP

iv Manual, 12/2005, A5E00427933-02