Sony STR-DA6400ES - Block Diagram - HDMI Section (1;2)

STR-DA6400ES
STR-DA6400ES
3232
6-4. BLOCK DIAGRAM - HDMI Section (1/2) -
• SIGNAL PATH
: AUDIO (DIGITAL)
: VIDEO
VIDEO SYSTEM CONTROLLER
IC3610 (1/3)
CN3501
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 5
CN3502
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 4
(for AUDIO)
CN3503
HDMI
ASSIGNABLE
(INPUT ONLY)
IN 3
CDT0P
CDT0N
CDT1P
CDT1N
CDT2P
CDT2N
CCLKP
CCLKN
52
51
7
9
55
54
4
6
58
57
1
3
49
48
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
HDMI INPUT
SELECTOR
IC3503
45
46
71
70
7
9
74
73
4
6
77
76
1
3
68
67
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
13
12
16
15
63
19
64
9
8
7
9
12
11
4
6
15
14
1
3
6
5
10
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
+5V POWER
HOT PLUG DET
18
CEC
CEC
13
12
16
15
SDA_C
2
SCL_C
3
HDMI RECEIVER
IC3511
(1/2)
HDMI TRANSMITTER
IC3513
34
35
40
39
YDT0P
31
YDT0N
YDT1P
YDT1N
YDT2P
YDT2N
YCLKP
YCLKN
32
44
43
28
29
48
47
25
26
52
R0XC+
R0XC–
R0X0+
R0X0–
R0X1+
R0X1–
R0X2+
R0X2–
DSDA0 DSCL0
51
33
R0PWR5V
35
DSCL1
29
DSDA1
28
R1PWR5V
DSCL
DSDA
30 34
CSDA CSCL
2627
SCL_SINK
38
SDA_SINK
39
HPD_SINK
40
OUTDIS
42
SELA
23
SELB
22
SELC
21
1444_SELB1
100
1444_SELA1
99
1444_OEB1
94
1444_HPD1
93
101
1444_SELC1
1444_SELB[1] 1444_SELA[1]
1444_OEB[1]
1444_HPD[1]
1444_SELC[1]
1444_SELB[1]
1444_SELA[1]
1444_OEB[1]
1444_HPD[1]
1444_SELC[1]
DATA SELECTOR
IC3508
EEPROM
IC3509
2Y3
4
2Y1
5
1Y3
11
1Y1
14
3
2–COM
13
1–COM
5
SDA
6
SCL
10
A
9
B
7
WP
8
TX_RST1
30
CEC_SEL
172
TX_INT1
123
TX_RST2
170
TX_INT2
169
UC3V_SCL
11 8
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SCL
UC3V_SDA
UC3V_SDA,
UC3V_SCL
11 7
EDIO_SEL1 EDIO_SEL0
173
REPEAT_PATH_SEL
9
2Y0
1
1Y0
12
+5V POWER SELECT
IC3526
1Y1
14
1Y2
15
2Y1
5
2Y2
2
13
1–COM
3
2–COM
9
B
10
A
1Y3
11
2Y3
+5V POWER 3
+5V POWER 2
+5V POWER 1
4
Q0 – Q15
98 – 90,
86 – 80
D0 – D15
79 – 77
75 – 67,
63 – 56
D16 – D35
ODCK
5
HSYNC
20
VSYNC
21
DE
FLI_ODCK[1] FLI_ODCK[2]
HSYNC
VSYNC
DE
19
SPDIF
78
SD0 –SD3
4 4
4
MCLK
89
SCK
86
WS
85
IDCK
88
HSYNC
2
VSYNC
3
DE
1
81 –84
SPDIF
DL0, DR1,
DL1, DR2
4
DL2
21
SD0 – SD3
MCLK
5
SCK
11
WS
10
DCLK
15
DR0
16
9 – 6
17 – 20
TX0+
34
TX0–
33
7
9
TX1+
37
TX1–
36
4
6
TX2+
40
TX2–
39
1
3
TXC+
31
TXC–
30
10
HPD
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
HOT PLUG DET
CEC
51 19
12
16
15
13
DSDA
47
DSCL
46
INT
24
RESET#
25
CSDA
49
CSCL
48
CEC DATA
SWITCH
Q2501 – 2504
CN3511
HDMI
ASSIGNABLE
(INPUT ONLY)
OUT A
TX_INT[1]
TX_RST[1]
TX_INT[1]
TX_RST[1]
TX_INT[2]
TX_RST[2]
CEC_RX
HDMI_SPDIF HDMI_LRCK HDMI_MCK HDMI_BCK SD0 –SD3
HDMI_BCK, HDMI_LRCK,
HDMI_MCK
HDMI_SPDIF
95
94
XTALIN
XTALOUT
X3501
28.322MHz
32
33
8
SD0
HDMI_SPDIF
SD0
SD2
SD2
SD1
SD1
SD3
SD3
1
36
CEC_TX
24
RX_HSYNC
RX_VSYNC
RX_DE
RX_ODCK[3]
D[2] – D[11],
D[14], D[15],
31
37
75
19
19
44
62
HPD_C
BDT0P
BDT0N
BDT1P
BDT1N
BDT2P
BDT2N
BCLKP
BCLKN
SDA_B
SCL_B
HPD_B
ADT0P
ADT0N
ADT1P
ADT1N
ADT2P
ADT2N
ACLKP
ACLKN
SDA_A
SCL_A
HPD_A
80
+5V_SELB
96
+5V_SELA
95
BUFFER
IC3525
LEVEL SHIFT
Q3501
LEVEL SHIFT
Q3500
BUFFER
IC3524
D[16] – D[23], D[26] – D[35]
Q[2] – Q[11],
Q[14], Q[15],
Q[16] – Q[23], Q[26] – Q[35]
16 – 13,
10 – 7,
3 – 1,144, 141 – 138
BUS
SWITCH
IC3858
BUS
SWITCH
IC3859
CLOCK GENERATOR
IC3862
RELAY DRIVE
IC3860
135 – 132, 129 – 126, 123 – 120,
117 – 114,
111 – 108
Q16 – Q35
RY3601
HDMI TRANSMITTER
IC3514
UC3V_SCL
UC3V_SDA
98 – 90,
86 – 80
D0 – D15
79 – 77
75 – 67,
63 – 56
D16 – D35
4
4
IDCK
88
HSYNC
2
VSYNC
3
DE
1
SPDIF
DL0, DR1,
DL1, DR2
4
DL2
21
SD0 –SD3
MCLK
5
SCK
11
WS
10
DCLK
15
DR0
16
9 – 6
17 – 20
TX0+
34
TX0–
33
7
9
TX1+
37
TX1–
36
4
6
TX2+
40
TX2–
39
1
3
TXC+
31
TXC–
30
10
HPD
DATA0+
DATA0–
DATA1+
DATA1–
DATA2+
DATA2–
CLOCK+
CLOCK–
SDA (5V)
SCL (5V)
HOT PLUG DET
51 19
12
16
15
DSDA
47
DSCL
46
INT
24
RESET#
25
CSDA
49
CSCL
48
CN3512
HDMI
ASSIGNABLE
(INPUT ONLY)
OUT B
TX_INT[2]
TX_RST[2]
REF
1
CLK1
3
CLK3
5
CLK2
2
CLOCK SELECT
IC3864
2D+
3
1D+
1
1D–
2
2D–
4
S
9
D+
8
D–
7
D–VIDEO BUS
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