b2= REV (reverse)
b3= STL1 (start L1)
b4= FWL1 (forward L1)
b5= REVL1 (reverse L1)
b6= STL2 (start L2)
b7= FWL2 (forward L2)
b8= REVL2 (reverse L2)
b9= STL3 (start L3)
b10= FWL3 (forward L3)
b11= REVL3 (reverse L3)
b12= STN (start N)
b13= FWN (forward N)
b14= REVN (reverse N)
The indications for general start START and phase-wise starts STL1, STL2 and
STL3, and neutral STN and general directional forward FW and reverse REV are
all available as outputs on the trip function.
All start and directional outputs are mapped to the IEC 61850 logical node data
model of the trip function. The time stamping is updated each time an operate or
start signal is changed:
• The common DIR output (general) is mapped as:
dirGeneral
0 unknown
1 forward
2 backward (reverse)
3 both
• The phase wise directional outputs (DIRL1, DIRL2, DIRL3 and DIRN) are
mapped as:
dirPhsA, dirPhsB, dirPhsC, dirNeut
0 unknown
1 forward
2 backward (reverse)
1MRK 505 384-UEN A Section 10
Logic
Breaker protection REQ650 2.2 IEC 331
Technical manual
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