on reset circuit is included in the
. The minimum requirements stated in
must be followed for the power
set to function properly. The internal power
up sequence is completed when
is pulled low. See Section
reset is completed the chip
will be in the IDLE state and the crystal
running. If the chip has had
sufficient time for the crystal oscil
stabilize after the power
will go low immediately after taking
is taken low before reset is completed the
pin will first go high, indicating that the
crystal oscillator is not stabilized, before going
The other global reset possibility on
command strobe. By issuing this
strobe, all internal registers and
up sequence is as follows (see
problems with pin control mode (see
high for at least 40 µs relative to
complete and the chip is in the IDLE state.
XOSC and voltage regulator switched on
the above reset procedure is only
the power supply is first
f the user wants to reset the
after this, it is only necessary to issue
The crystal oscillator (XOSC) is either
automatically controlled or always on, if
In the automatic mode, the XOSC will be
strobes are issued; the state machine then
goes to XOFF or SLEEP respectively. This
can only be done from the IDLE state. The
XOSC will be turned off when
high). The XOSC will be automatically
machine will then go to the IDLE state. The
pin on the SPI interface must be
before the SPI interface is ready to be used;
If the XOSC is forced on, the crystal will
always stay on even in the SLEEP state.
crystal ESR and load capacitances. The
al specification for the crystal oscillator
Voltage Regulator Control
The voltage regulator to the digital core is
controlled by the radio cont
chip enters the SLEEP state, which is the state
with the lowest current consumption,
regulator is disabled. This occurs after
strobe has been sent on the SPI interface. The
low again will turn on the regulator and crystal