To ensure optimal matching of the
differential output it is
follow the CC2500EM reference designs
closely as possible. Gerbe
reference designs are available for download
PCB Layout Recommendations
The top layer should be used for signal
routing, and the open areas should be filled
with metallization connected to ground using
The area under the chip is used for grounding
be connected to the bottom ground
and sufficiently low inductance to
. In the CC2500EM reference designs
attached pad. These vias should be “tented”
(covered with solder mask) on the component
side of the PCB to avoid migration of solder
through the vias during the solder reflow
out gassing may occur during the
reflow process, which may cause defects
(splattering, solder balling).
reduces the solder paste coverage below
for top solder resist and top
PCB layout for QLP 20 package.
Each decoupling capacitor should be placed
as close as possible to the supply pin it is
supposed to decouple. Each d
capacitor should be connected to the power
line by separate vias. The best routing is from
the power line to the decoupling capacitor and
filtering is very important.
Each decoupling capacitor ground p
be connected to the ground plane using a
separate via. Direct connections between
neighboring power pins will increase noise
coupling and should be avoided unless
The external components should ideally be as
ble (0402 is recommended) and
surface mount devices are highly
Please note that components
smaller than those specified may have
differing characteristics.
Precaution should be used when placing the
microcontroller in order to avoid noise
rfering with the RF circuitry.
A CC2500/2550DK Development Kit with a
fully assembled CC2500EM Evaluation
Module is available. It is strongly advised that
this reference layout is followed very closely in
order to get the best performance. The
OM and layout Gerber files are all
ask (negative). Right: Top