be set to the centre of the lowest channel
frequency that is to be us
The desired channel number is programmed
bit channel number register,
, which is multiplied by the
channel offset. The resultant carrier frequency
spacing is 405 kHz. To get e.g. 1 MHz channel
spacing one solution is to use 333 kHz
channel spacing and select each third channel
The preferred IF frequency is programmed
automatically calculates the optimum
register setting based on
channel spacing and channel filter bandwidth.
If any frequency programming register is
altered when the frequency synthesizer is
running, the synthesizer may give an
undesired response. Hence, the frequency
ing should only be updated when
the radio is in the IDLE state.
The VCO is completely integrated on
The VCO characteristics will vary with
temperature and supply voltage changes, as
well as the desired operating f
order to ensure reliable operation,
includes frequency synthesizer self
circuitry. This calibration should be done
regularly, and must be performed after turning
on power and before using a new frequency
completing the PLL calibration is given in
The calibration can be initiated automatically
or manually. The synthesizer can be
synthesizer is turned on, or each time the
synthesizer is turned off
register setting. In manual mode, the
calibration is initiated when the
command strobe is activated in the IDLE
Note that the calibration values are maintained
mode, so the calibration is still valid
supply voltage or temperature has changed
the PLL is in lock the user can
and use the lock detector output available on
pin as an interrupt for the MCU
. A positive transition on the
means that the PLL is in lock. As an alte
the user can read register
in lock if the register content is different from
For more robust operation the source code
check so that the PLL is re
calibrated until PLL lock is achieved if the PLL
does not lock the first time.