CONTENTS
CONTENTS
1． APPEARANCE DESCRIPTION ...............................................1
1-1．Front Panel ............................................................................................ 1
1-2．Status LED ............................................................................................. 2
1-3．Unit Number Select Switch .................................................................. 3
1-4．DIP Switch ............................................................................................. 4
2．CONNECTION ........................................................................5
2-1．F159 Block Terminal ............................................................................. 5
2-2．Load Cell Connection ........................................................................... 5
2-2-1 6-wire Connection .............................................................................. 6
2-2-2 4-wire Connection .............................................................................. 6
2-2-3 Connecting Load cells in Parallel ..................................................... 8
2-3．Output Connection ............................................................................. 12
2-3-1 Equivalent Circuit ............................................................................ 12
2-4．Connections to Terminal Block ......................................................... 13
3．DATA EXCHANGE WITH CPU ............................................14
3-1．High Performance I/O Unit Restart Flag ........................................... 15
3-2．Relay Area ........................................................................................... 16
3-2-1 Allocation of Weight and Status Data ............................................ 16
3-2-2 OUT (CPU unit → F159) ................................................................... 16
3-2-3 IN (F159 → CPU unit) ....................................................................... 19
3-2-4 Register Allocations for Weighing Control ................................... 28
3-2-5 Register Allocations for Initial Settings ......................................... 29
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