ABB REC 561 - Appendix; Terminal Diagram

Configurable logic
ABB Network Partner AB
1MRK 580 161-XEN
Page 4 - 33
Version 1.0-00
6 Appendix
6.1 Terminal diagram
Fig. 12 Simplified terminal diagram of the Inverter function
Fig. 13 Simplified terminal diagram of the OR function
Fig. 14 Simplified terminal diagram of the AND function
Fig. 15 Simplified terminal diagram of the Timer function
INPUT
OUT
(X80161-12)
IVnn
INV
INPUT1
INPUT2
INPUT3
INPUT4
OUT
NOUT
INPUT5
INPUT6
(X80161-13)
Onnn
OR
INPUT1
INPUT2
INPUT3
INPUT4N
OUT
NOUT
(X80161-14)
Annn
AND
INPUT
T
OFF
ON
(X80161-15)
TMnn
Timer