Altera DE2-115 - Page 50

49
Figure 4-19 Using Emulated LVDS on GPIO
Table 4-12 Pin Assignments for Expansion Headers
Signal Name
FPGA Pin No.
Description
I/O Standard
GPIO[0]
PIN_AB22
GPIO Connection DATA[0]
Depending on JP6
GPIO[1]
PIN_AC15
GPIO Connection DATA[1]
Depending on JP6
GPIO[2]
PIN_AB21
GPIO Connection DATA[2]
Depending on JP6
GPIO[3]
PIN_Y17
GPIO Connection DATA[3]
Depending on JP6
GPIO[4]
PIN_AC21
GPIO Connection DATA[4]
Depending on JP6
GPIO[5]
PIN_Y16
GPIO Connection DATA[5]
Depending on JP6
GPIO[6]
PIN_AD21
GPIO Connection DATA[6]
Depending on JP6
GPIO[7]
PIN_AE16
GPIO Connection DATA[7]
Depending on JP6
GPIO[8]
PIN_AD15
GPIO Connection DATA[8]
Depending on JP6
GPIO[9]
PIN_AE15
GPIO Connection DATA[9]
Depending on JP6
GPIO[10]
PIN_AC19
GPIO Connection DATA[10]
Depending on JP6
GPIO[11]
PIN_AF16
GPIO Connection DATA[11]
Depending on JP6
GPIO[12]
PIN_AD19
GPIO Connection DATA[12]
Depending on JP6
GPIO[13]
PIN_AF15
GPIO Connection DATA[13]
Depending on JP6
GPIO[14]
PIN_AF24
GPIO Connection DATA[14]
Depending on JP6
GPIO[15]
PIN_AE21
GPIO Connection DATA[15]
Depending on JP6
GPIO[16]
PIN_AF25
GPIO Connection DATA[16]
Depending on JP6
GPIO[17]
PIN_AC22
GPIO Connection DATA[17]
Depending on JP6
GPIO[18]
PIN_AE22
GPIO Connection DATA[18]
Depending on JP6
GPIO[19]
PIN_AF21
GPIO Connection DATA[19]
Depending on JP6
GPIO[20]
PIN_AF22
GPIO Connection DATA[20]
Depending on JP6
GPIO[21]
PIN_AD22
GPIO Connection DATA[21]
Depending on JP6
GPIO[22]
PIN_AG25
GPIO Connection DATA[22]
Depending on JP6
GPIO[23]
PIN_AD25
GPIO Connection DATA[23]
Depending on JP6
GPIO[24]
PIN_AH25
GPIO Connection DATA[24]
Depending on JP6
GPIO[25]
PIN_AE25
GPIO Connection DATA[25]
Depending on JP6
GPIO[26]
PIN_AG22
GPIO Connection DATA[26]
Depending on JP6
GPIO[27]
PIN_AE24
GPIO Connection DATA[27]
Depending on JP6
GPIO[28]
PIN_AH22
GPIO Connection DATA[28]
Depending on JP6