Altera DE2-115 - Page 67

66
Figure 4-37 Connections between FPGA and SD Card Socket
Table 4-27 SRAM Pin Assignments
Signal Name
FPGA Pin No.
Description
I/O Standard
SRAM_ADDR[0]
PIN_AB7
SRAM Address[0]
3.3V
SRAM_ADDR[1]
PIN_AD7
SRAM Address[1]
3.3V
SRAM_ADDR[2]
PIN_AE7
SRAM Address[2]
3.3V
SRAM_ADDR[3]
PIN_AC7
SRAM Address[3]
3.3V
SRAM_ADDR[4]
PIN_AB6
SRAM Address[4]
3.3V
SRAM_ADDR[5]
PIN_AE6
SRAM Address[5]
3.3V
SRAM_ADDR[6]
PIN_AB5
SRAM Address[6]
3.3V
SRAM_ADDR[7]
PIN_AC5
SRAM Address[7]
3.3V
SRAM_ADDR[8]
PIN_AF5
SRAM Address[8]
3.3V
SRAM_ADDR[9]
PIN_T7
SRAM Address[9]
3.3V
SRAM_ADDR[10]
PIN_AF2
SRAM Address[10]
3.3V
SRAM_ADDR[11]
PIN_AD3
SRAM Address[11]
3.3V
SRAM_ADDR[12]
PIN_AB4
SRAM Address[12]
3.3V
SRAM_ADDR[13]
PIN_AC3
SRAM Address[13]
3.3V
SRAM_ADDR[14]
PIN_AA4
SRAM Address[14]
3.3V
SRAM_ADDR[15]
PIN_AB11
SRAM Address[15]
3.3V
SRAM_ADDR[16]
PIN_AC11
SRAM Address[16]
3.3V
SRAM_ADDR[17]
PIN_AB9
SRAM Address[17]
3.3V
SRAM_ADDR[18]
PIN_AB8
SRAM Address[18]
3.3V
SRAM_ADDR[19]
PIN_T8
SRAM Address[19]
3.3V
SRAM_DQ[0]
PIN_AH3
SRAM Data[0]
3.3V
SRAM_DQ[1]
PIN_AF4
SRAM Data[1]
3.3V
SRAM_DQ[2]
PIN_AG4
SRAM Data[2]
3.3V
SRAM_DQ[3]
PIN_AH4
SRAM Data[3]
3.3V
SRAM_DQ[4]
PIN_AF6
SRAM Data[4]
3.3V
SRAM_DQ[5]
PIN_AG6
SRAM Data[5]
3.3V
SRAM_DQ[6]
PIN_AH6
SRAM Data[6]
3.3V