Altera DE2-115 - Page 68

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SRAM_DQ[7]
PIN_AF7
SRAM Data[7]
3.3V
SRAM_DQ[8]
PIN_AD1
SRAM Data[8]
3.3V
SRAM_DQ[9]
PIN_AD2
SRAM Data[9]
3.3V
SRAM_DQ[10]
PIN_AE2
SRAM Data[10]
3.3V
SRAM_DQ[11]
PIN_AE1
SRAM Data[11]
3.3V
SRAM_DQ[12]
PIN_AE3
SRAM Data[12]
3.3V
SRAM_DQ[13]
PIN_AE4
SRAM Data[13]
3.3V
SRAM_DQ[14]
PIN_AF3
SRAM Data[14]
3.3V
SRAM_DQ[15]
PIN_AG3
SRAM Data[15]
3.3V
SRAM_OE_N
PIN_AD5
SRAM Output Enable
3.3V
SRAM_WE_N
PIN_AE8
SRAM Write Enable
3.3V
SRAM_CE_N
PIN_AF8
SRAM Chip Select
3.3V
SRAM_LB_N
PIN_AD4
SRAM Lower Byte Strobe
3.3V
SRAM_UB_N
PIN_AC4
SRAM Higher Byte Strobe
3.3V
Table 4-28 SDRAM Pin Assignments
Signal Name
FPGA Pin No.
Description
I/O Standard
DRAM_ADDR[0]
PIN_R6
SDRAM Address[0]
3.3V
DRAM_ADDR[1]
PIN_V8
SDRAM Address[1]
3.3V
DRAM_ADDR[2]
PIN_U8
SDRAM Address[2]
3.3V
DRAM_ADDR[3]
PIN_P1
SDRAM Address[3]
3.3V
DRAM_ADDR[4]
PIN_V5
SDRAM Address[4]
3.3V
DRAM_ADDR[5]
PIN_W8
SDRAM Address[5]
3.3V
DRAM_ADDR[6]
PIN_W7
SDRAM Address[6]
3.3V
DRAM_ADDR[7]
PIN_AA7
SDRAM Address[7]
3.3V
DRAM_ADDR[8]
PIN_Y5
SDRAM Address[8]
3.3V
DRAM_ADDR[9]
PIN_Y6
SDRAM Address[9]
3.3V
DRAM_ADDR[10]
PIN_R5
SDRAM Address[10]
3.3V
DRAM_ADDR[11]
PIN_AA5
SDRAM Address[11]
3.3V
DRAM_ADDR[12]
PIN_Y7
SDRAM Address[12]
3.3V
DRAM_DQ[0]
PIN_W3
SDRAM Data[0]
3.3V
DRAM_DQ[1]
PIN_W2
SDRAM Data[1]
3.3V
DRAM_DQ[2]
PIN_V4
SDRAM Data[2]
3.3V
DRAM_DQ[3]
PIN_W1
SDRAM Data[3]
3.3V
DRAM_DQ[4]
PIN_V3
SDRAM Data[4]
3.3V
DRAM_DQ[5]
PIN_V2
SDRAM Data[5]
3.3V
DRAM_DQ[6]
PIN_V1
SDRAM Data[6]
3.3V
DRAM_DQ[7]
PIN_U3
SDRAM Data[7]
3.3V
DRAM_DQ[8]
PIN_Y3
SDRAM Data[8]
3.3V
DRAM_DQ[9]
PIN_Y4
SDRAM Data[9]
3.3V
DRAM_DQ[10]
PIN_AB1
SDRAM Data[10]
3.3V
DRAM_DQ[11]
PIN_AA3
SDRAM Data[11]
3.3V
DRAM_DQ[12]
PIN_AB2
SDRAM Data[12]
3.3V
DRAM_DQ[13]
PIN_AC1
SDRAM Data[13]
3.3V
DRAM_DQ[14]
PIN_AB3
SDRAM Data[14]
3.3V
DRAM_DQ[15]
PIN_AC2
SDRAM Data[15]
3.3V