Atmel ATtiny13A User Manual

48
8126F–AVR–05/12
ATtiny13A
9.3.3 GIFR – General Interrupt Flag Register
• Bits 7, 4:0 – Res: Reserved Bits
These bits are reserved bits in the ATtiny13A and will always read as zero.
• Bit 6 – INTF0: External Interrupt Flag 0
When an edge or logic change on the INT0 pin triggers an interrupt request, INTF0 becomes set
(one). If the I-bit in SREG and the INT0 bit in GIMSK are set (one), the MCU will jump to the cor-
responding Interrupt Vector. The flag is cleared when the interrupt routine is executed.
Alternatively, the flag can be cleared by writing a logical one to it. This flag is always cleared
when INT0 is configured as a level interrupt.
• Bit 5 – PCIF: Pin Change Interrupt Flag
When a logic change on any PCINT[5:0] pin triggers an interrupt request, PCIF becomes set
(one). If the I-bit in SREG and the PCIE bit in GIMSK are set (one), the MCU will jump to the cor-
responding Interrupt Vector. The flag is cleared when the interrupt routine is executed.
Alternatively, the flag can be cleared by writing a logical one to it.
9.3.4 PCMSK – Pin Change Mask Register
• Bits 7:6 – Res: Reserved Bits
These bits are reserved bits in the ATtiny13A and will always read as zero.
• Bits 5:0 – PCINT[5:0]: Pin Change Enable Mask 5:0
Each PCINT[5:0] bit selects whether pin change interrupt is enabled on the corresponding I/O
pin. If PCINT[5:0] is set and the PCIE bit in GIMSK is set, pin change interrupt is enabled on the
corresponding I/O pin. If PCINT[5:0] is cleared, pin change interrupt on the corresponding I/O
pin is disabled.
Bit 76543210
0x3A –INTF0PCIF–––––GIFR
Read/WriteRR/WR/WRRRRR
Initial Value00000000
Bit 76543210
0x15 – – PCINT5 PCINT4 PCINT3 PCINT2 PCINT1 PCINT0 PCMSK
Read/Write R R R/W R/W R/W R/W R/W R/W
Initial Value00000000

Atmel ATtiny13A Specifications

General

Brand	Atmel
Model	ATtiny13A
Category	Microcontrollers
Language	English

Summary

Pin Configurations

ATtiny13A CPU Core

CPU Core Architectural Overview

ALU and Status Register

Description of the Arithmetic Logic Unit (ALU) and the Status Register.

General Purpose Register File

Reset and Interrupt Handling

How the microcontroller handles resets and interrupts for system control.

ATtiny13A Memories

Flash Program Memory

Details on the In-System Reprogrammable Flash Program Memory.

SRAM and EEPROM Data Memory

Description of SRAM and EEPROM data memory organization and features.

System Clock and Clock Options

Clock Systems and Distribution

Clock Sources and Prescaler

Details on available clock sources and the system clock prescaler.

Power Management and Sleep Modes

Sleep Modes Overview

Explanation of the different sleep modes available for power saving.

Software BOD Disable and Power Reduction

Methods for software control of Brown-out Detector and power reduction.

System Control and Reset

Resetting the AVR and Reset Sources

Details on resetting the AVR and the different reset sources.

Internal Voltage Reference and Watchdog Timer

Interrupts

Interrupt Vectors and External Interrupts

Details on interrupt vectors and external interrupt sources.

Interrupt Register Description

I/O Ports

I/O Ports Overview and General Digital I/O

Overview of I/O ports and their use as general digital inputs/outputs.

Alternate Port Functions and Register Description

8-bit Timer/Counter0 with PWM

Timer/Counter Features and Overview

Features and overview of the 8-bit Timer/Counter0 module with PWM support.

Clock Sources, Counter Unit, and Output Compare Unit

Details on clock sources, counter unit, and output compare functionality.

Compare Match Output Unit, Modes of Operation, and Timing Diagrams

How compare matches affect output, operational modes, and timing.

Timer/Counter Prescaler

Prescaler Overview, Reset, and External Clock

Analog Comparator

Analog Comparator Multiplexed Input and Register Description

Details on multiplexed inputs and register descriptions for the analog comparator.

Analog to Digital Converter (ADC)

ADC Features and Overview

ADC Operation and Conversion Start

Description of ADC operation and how to initiate a conversion.

ADC Prescaling, Timing, and Channel Selection

ADC Noise Canceling, Input, and Accuracy

ADC Conversion Result and Register Description

debugWIRE On-chip Debug System

debugWIRE Features, Overview, and Interface

Features, overview, and physical interface of the debugwire system.

Software Breakpoints, Limitations, and Registers

Self-Programming the Flash

Flash Programming Procedures

Programming Considerations and Time

Memory Programming

Program and Data Memory Lock Bits

Fuse Bytes

Calibration Bytes

Electrical Characteristics

Absolute Maximum Ratings and DC Characteristics

Defines the absolute maximum operating conditions and DC electrical parameters.

Speed, Clock, and System/Reset Characteristics

Analog Comparator and ADC Characteristics

Serial and High-voltage Programming Characteristics

Register Summary

Instruction Set Summary