Bosch Sensortec"| BST-BMP581-DS004-02 5 | 74
Modifications reserved | Data subject to change
without notice Document number: BST-BMP581-DS004-02
7.2 Register (0x02) ASIC revision ID ...................................................................................................................... 51
7.3 Register (0x11) ASIC status register ................................................................................................................. 51
7.4 Register (0x13) Configure host interface related settings (NVM-backed) .......................................................... 52
7.5 Register (0x14) Interrupt configuration register ................................................................................................. 52
7.6 Register (0x15) INT source selection ................................................................................................................ 54
7.7 Register (0x16) FIFO configuration ................................................................................................................... 54
7.8 Register (0x17) Number of frames in FIFO ....................................................................................................... 55
7.9 Register (0x18) FIFO selection configuration .................................................................................................... 55
7.10 Register (0x1C) Reserved ................................................................................................................................ 56
7.11 Register (0x1D) Temperature XLSB .................................................................................................................. 56
7.12 Register (0x1E) Temperature LSB .................................................................................................................... 56
7.13 Register (0x1F) Temperature MSB ................................................................................................................... 56
7.14 Register (0x20) Pressure XLSB ........................................................................................................................ 56
7.15 Register (0x21) Pressure LSB .......................................................................................................................... 57
7.16 Register (0x22) Pressure MSB ......................................................................................................................... 57
7.17 Register (0x23) Reserved ................................................................................................................................. 57
7.18 Register (0x24) Reserved ................................................................................................................................. 57
7.19 Register (0x25) Reserved ................................................................................................................................. 57
7.20 Register (0x26) Reserved ................................................................................................................................. 58
7.21 Register (0x27) Interrupt status register (clear-on-read). .................................................................................. 58
7.22 Register (0x28) Status register ......................................................................................................................... 58
7.23 Register (0x29) FIFO output port ...................................................................................................................... 58
7.24 Register (0x2B) NVM address .......................................................................................................................... 59
7.25 Register (0x2C) NVM data (LSB) ...................................................................................................................... 59
7.26 Register (0x2D) NVM data (MSB) ..................................................................................................................... 59
7.27 Register (0x30) DSP configuration .................................................................................................................... 60
7.28 Register (0x31) DSP IIR configuration .............................................................................................................. 61
7.29 Register (0x32) Out-of-range (OOR) threshold for pressure (LSB) ................................................................... 62
7.30 Register (0x33) Out-of-range (OOR) threshold for pressure (MSB) .................................................................. 62
7.31 Register (0x34) Out-of-range (OOR) range configuration ................................................................................. 62
7.32 Register (0x35) Out-of-range (OOR) configuration ........................................................................................... 62