Denon LA-3500 - Page 50

- L A-3500
IC M N1 87324GD (IC90 1)
MN187324XGD Terminal Function
Pin
Symbol 1/0 Active Name F unction
No.
1 PSS
0
H
seg6
FL display segment signal.
2
PSS
0
H
segS
FL display segment signal.
3
PS4
0
H seg4 FL display segment signal.
4 PS3
0
H seg3 FL display segment signal.
s PS2 0
H
seg2
FL display segment signal.
6 PS1
0
H seg1
FL display segment signal.
7 PSO 0 H segO
FL display segment signal.
8 Vpp - - Vpp
Pull down voltage input for high tension
voltage output.
9 Vdd
-
- Vdd SV power supply.
10 OSC2 I - OSC2 Clock input.
11 OSC1
0
- OSC1 Clock output.
12 Vss - - Vss Ground.
13 XI
I
-
XI Not used .
14
XO 0
-
XO Not used.
1S P27 I L C4
Shuttle C-4, becomes Low when turned ON .
16 P26 I L C3 Shuttle C-3 , becomes L ow when turned ON.
17 P2S I L C2 Shuttle C-2, becomes L ow when turned ON.
18 P24 I L C1
Shuttle C-1 . becomes Low when turned ON.
19 P23 I L
MACK Mechanism control acknowledge .
20 P22 0 L OACK
Operation control acknowledge .
21
P21
I L
J1 J
og J1 , turned ON to Low.
22 P20 I H BLKCLK
Block signal
(from P in 39 of MN6626 E IMDSP).
23 P1S I H R. Data Remote command reception data .
24 P14 I H VTM Vertical sync signal.
2S P13
0
L SGS
Chip se l ector.
26 P12 I L J2
Jog J2. becomes Low when turned ON.
27 P11
0
H OE Not used.
28
P10
0
H
CK -L
Not used.
2g
P07 I L
>tRST
Microcomputer rese t.
30 POS 0
H SC LK Serial clock signal.
31 P04
0
- N. C. Not used.
32
P03
0 H
A
SBO I serial data.
50
Pin
Symbo l
1/0
Active
Name F unction
No .
33
P02
0
-
pC LK SBTO serial data signal.
34 P0 1 I L pSTIS Seria l input data signal.
3S
P01
0
L
>tCKD
Serial output data signal.
36
P01
0
-
SYNC 32768 divided clock output of Pin 11.
37 CM
I L CM Chip mode selection terminal.
38
P47
I H P47 Key scan input.
39
P 46
I H P48 Key scan input.
40 P4S I H P45 Key scan input.
41 P44 - - Not used.
42 P43
0 H pc LED Picture quality control LED display .
43
P42 - - Not used.
44 P41
I H P WBCHK
PW B check mode. becomes check mode
when turned to H igh.
4S P40
I H
PO
Key scan input.
46
P87
0
H DGTO Grid 1 of FL.
47 P86
0
H
DGT1 Grid 2 of F L.
48 PSS
0 H DG T2
Grid 3 of FL .
49 P84
0
H
DGT3 Grid 4 of F L.
so P83
0
H DGT4 Grid 5 of FL.
51 P82
0 H DG T5 Grid 6 of F L.
S2
P81
0 H DGT6 Gr id 7 of F L.
S3 P80
0
H
DGT7
Gr id 8 of FL .
54
P71
0
H DGTS
Grid 9 of FL .
55
P70
0 H DGT9
Gri d 10 of F L.
56 P67
0
H SE G15 FL display segment signa l.
57 P66
0
H SEG14 FL display segment signal.
SS P65
0
H SEG13 FL display segment signal.
59
P64
0 H SE G12 FL display segment signal.
60
P 63
0
H
SE
G11 FL display segment signal.
61
P62 0 H SE G10 FL display segment signal.
62 P61
0 H SEG9 FL display segment signal.
63 P 60
0
H
SE GS FL display segment sign a l.
64 P57
0
H
SE
G7 FL display segment signal.
No t e: No connect termin al when using input or output port set output
mode
in Low level.