Micronics C400 System Board Manual
Appendix B: POST Codes
68
Code
(hex)
Description
10 Test DMA Controller 1
11 Test DMA Page Registers Test DMA Page Registers.
12-13 Reserved
14 Test Timer Counter 2 Test 8254 Timer 0 Counter 2.
15 Test 8259-1 Mask Bits Verify 8259 Channel 1 masked ts interrupts by
alternately turning off and on the interrupt lines.
16 Test 8259-2 Mask Bits Verify 8259 Channel 2 masked interrupts by alternately
turning off and on the interrupt lines.
17 Test Stuck 8259's Interrupt Bits Turn off interrupts then verify interrupt mask register is
on.
18 Test 8259 Interrupt Functionality Force an interrupt and verify the interrupt occurred.
19 Test Stuck NMI Bits (Parity/IO
Check)
Verify NMI can be cleared.
1A Display CPU clock
1B-1E Reserved
1F Set EISA Mode If EISA non-volatile memory checksum is good,
execute EISA initialization. If not, execute ISA tests an
clear EISA mode flag.Test EISA Configuration Memory
Integrity (checksum & communication interface).
20 Enable Slot 0 Initialize slot 0 (System Board).
21-2F Enable Slots Initialize slots 1 through 15.
1-15
30 Size Base and Size base memory from 256K to 640K Extended
Memory and extended memory above 1MB.
31 Test Base and Test base memory from 256K to 640K Extended
Memory and extended memory above 1MB using
various patterns. NOTE: This test is skipped in EISA
mode and can be skipped with ESC key in ISA mode.x
32 Test EISA If EISA Mode flag is set then test Extended Memory
EISA memory found in slots initialization.x NOTE:
This test is skipped in ISA mode and can be skipped
with ESC keyin EISA mode.
33-3B Reserved
3C Setup Enabled
3D Initialize & Install Mouse Detect if mouse is present, initialize mouse, install
interrupt vectors.
3E Setup Cache Controller Initialize cache controller.
3F Reserved
BF Chipset Initialization Program chipset registers with Setup values
40 Display virus protect disable or
enable
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