95
95
95
95
No parameter of Latching relay can be set/modified in parameter mode .
Timing
Timing
Timing
Timing diagram
diagram
diagram
diagram
Description
Description
Description
Description of
of
of
of the
the
the
the function
function
function
function
The latching relay represents a simple binary memory logic. The output value depends on the
input states and the previous status at the output.
Logic table of the latching relay:
S
S
S
S R
R
R
R Q
Q
Q
Q Remark
Remark
Remark
Remark
0 0 x Status unchanged
0 1 0 Reset
1 0 1 Set
1 1 0 Reset
When retentivity is enabled, the output signal corresponds with the signal status prior to the
power failure.
4
4
4
4 .4.17
.4.17
.4.17
.4.17 Pulse
Pulse
Pulse
Pulse relay
relay
relay
relay
Short
Short
Short
Short description
description
description
description
The output is set and reset with a short one-shot at the input.
Connection
Connection
Connection
Connection Description
Description
Description
Description
Input S
S
S
S Set output Q with a signal at input S (Set).
Input R
R
R
R Reset output Q with a signal at input R (Reset). Output Q is
reset if S and R are both set (reset has priority over set).
Parameter Retentivity
Retentivity
Retentivity
Retentivity set (on) = the status is retentive in memory.
Output Q
Q
Q
Q Q is set with a signal at input S and remains set until it is
reset with signal at input R.
Connection
Connection
Connection
Connection Description
Description
Description
Description