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EKF SC3-LARGO - CompactPCI Serial Backplane Connectors P1 - P6

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User Guide • SC3-LARGO • CompactPCI
®
Serial CPU Board • Intel
®
Core
TM
5xxx Processor
CompactPCI
®
Serial Backplane Connectors P1 - P6
The SC3-LARGO is provided with six high speed backplane connectors P1 - P6, compliant with the
CompactPCI
®
Serial specification (pin mapping for system boards).
The PCI Express
®
Lanes 1_PE_* to 2_PE_* are derived directly from the Core
TM
processor and capable
to transfer 8GT/s (PCIe Gen3). These lanes are assigned via the backplane to the CompactPCI
®
Serial
fat pipe slots, for a maximum link width of 8 each.
P1 CompactPCI
®
Serial Slot Backplane Connector Type A
EKF Part #250.3.1206.20.02 • 72 pos. 12x6, 14mm Width
P1 A B C D E F G H I J K L
6
GND
1
PE
TX02+
1
PE
TX02-
GND
1
PE
RX02+
1
PE
RX02-
GND
1
PE
TX03+
1
PE
TX03-
GND
1
PE
RX03+
1
PE
RX03-
5
1 PE
TX00+
1)
1 PE
TX00-
1)
GND
1
PE
RX00+
1
PE
RX00-
GND
1
PE
TX01+
1
PE
TX01-
GND
1
PE
RX01+
1
PE
RX01-
GND
4
GND
1
USB2+
1
USB2-
GND RSV RSV GND
1
SATA
TX+
1
SATA
TX-
GND
1
SATA
RX+
1
SATA
RX-
3
1
USB3
TX+
1
USB3
TX-
PWR
BTN#
1
USB3
RX+
1
USB3
RX-
PWR_
FAIL#
SATA
SDI
4)
SATA
SDO
3) 4)
GA2
SATA
SCL
2) 4)
SATA
SL
GA3
2
GND
I2C
SCL
I2C
SDA
GND
PS_
ON#
RST# GND PRST#
WAKE_I
N#
GND RSV
SYS
EN#
1
+12V
+5V
STBY
GND +12V +12V GND +12V +12V GND +12V +12V GND
pin positions printed gray: not connected
1) Polarity inversion was made on these lanes on SC3-LARGO for better routing. This is allowed
according the “PCI Express Base Specification 3.0" and has no effect on function or
performance of the link. The pin-out shown is as per specification.
2) This pin may carry the IEEE 1588 Pulse per Second (PPS) signal when enabled within UEFI BIOS
settings.
3) This pin may carry the IEEE 1588 Pulse per Minute (PPM) signal when enabled within UEFI BIOS
settings.
4) 10k Pull-Up resistor to +3.3V when board is inserted in system controller slot.
© EKF -101- ekf.com

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