EKF SC3-LARGO - Read;Clear Status Register 0

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User Guide • SC3-LARGO • CompactPCI

Serial CPU Board • Intel

Core

5xxx Processor

Read/Clear Status Register 0

Write: SMBus Address 0xB0

Read: SMBus Address 0xB1

Bit Description CMD_STAT0

7 PF18S

0=Normal operation

1=Last system reset may be caused by a power failure of the +V1.8S voltage regulator

6 PF15S

0=Normal operation

1=Last system reset may be caused by a power failure of the +V1.5S voltage regulator

5 PF135S

0=Normal operation

1=Last system reset may be caused by a power failure of the +V1.35S voltage regulator

4 RESERVED

Always read as 0

3 PF105M

0=Normal operation

1=Last system reset may be caused by a power failure of the +V1.05M voltage regulator

2 PF105S

0=Normal operation

1=Last system reset may be caused by a power failure of the +V1.05S voltage regulator

1 RESERVED

Always read as 0

0 PFVRC

0=Normal operation

1=Last system reset may be caused by a power failure of the CPU voltage regulator

The bits in this register are sticky, i.e. their state will be kept even if a system reset occurs. To clear the

bits a write to the register with arbitrary data may be performed.