EKF SC3-LARGO - PCI Express Interface

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User Guide • SC3-LARGO • CompactPCI

Serial CPU Board • Intel

Core

5xxx Processor

PCI Express

Interface

The SC3-LARGO is provided with several PCI Express (PCIe) lanes for I/O expansion. Sixteen PCI Express

lanes, originating from the Core

processor, are building the two fat pipes defined by CompactPCI

Serial. These two links consists of eight lanes with transfer rates of up to 8Gbps (PCI Express Gen 3).

The QM87 offers a total of eight PCI Express ports supporting PCIe Gen 2 speed (5GT/s). Four of them

form the upstream link to a PCI Express switch. The output ports (downstream ports) of the PCIe

switch are connected to the CompactPCI

Serial connectors P4/P5 (six lanes), to the local PCIe

expansion interface connector P-PCIE (four lanes) and to two of the Ethernet controllers (i210IT).

Two small DIP switches (DS-P) located on the backside of the board are used to configure different

lane widths to each of both downstream interfaces and to choose the interface transfer rate. Possible

settings are

< Six links x 1 to CompactPCI

Serial P4/P5, two links x 1 to i217IT and a single link x 4 to P-PCIE

< Six links x 1 to CompactPCI

Serial P4/P5, two links x 1 to i217IT and four links x 1 to P-PCIE

< 2.5GT/s or 5GT/s transfer speed

See section “Configuration PCI Express Switch (DS-P)” for details.