Furuno DSC-60 - Page 23

2-13
3. Function and overview of each board
CONTROL/MODEM block diagramCONTROL/MODEM block diagram CONTROL/MODEM block diagramCONTROL/MODEM block diagram
CONTROL/MODEM block diagram
Flash ROM
DSP
MAIN CPU
ADD DATA CLK
Sport1 Reset
Reset
FL0
RFS0
SCLK0
Sport0
ADSP2181KST-115
MBM29F400BC -90PFTNFK
U6,7(SRAM):KM681000CLG
Flash ROM
EEPROM
8bitx32k
GATE ARRAY
LZ9GF18
SRAM
16bitx125k16bitx512k
Shift Register
TC74HC595AFx2
TC74HC541AFx2
TC74HC541AFx2
SIO&PIO
M38881M2
Reset
Reset
Reset
Reset Vcc
X SIO1
PB4-7
PWM0
INT0 INT1
CLKout
MNI
DATA
ADD
PB1-3
PF1-2
PE4-6/PF0
P81-82
SIO-0
Program RAM:16kW
DATA RAM:16kW
FR30
X'tal
X'tal
X'tal
11.804MHz
X'tal
5.12MHz
12.5MHz
12.5MHz
Reset
Reset
Reset
S DATA BIT-CLK SYNC
Lin-L Lin-R
Lout-L
X
CODEC
AD1819BJST
Limiter
1SS226
Limiter
1SS226
L.P.F
NJM4558M
L.P.F
NJM4558M
L.P.F
NJM4558M
Line AMP
NJM3404AM
SW
MC14066BF
SW
MC14066BF
16bit bus
16bit bus
8bit bus
RS-422 CONV.
RS-232C/422 CONV.
Buzz Driver
Interface
LED Driver
Printer Driver
BK CONT, Driver
D/A CONV.
Buffer
8bit bus 8bit bus
PA P B
SIO1
SIO2 SIO3
SW
DTD143EK
DTD143EKx5
DTC114EAKx3
M62352GP
LD CLK/DATA
DC/DC CONV.
SI-8301L
Reset
M51957BFP
+5V
25MHz
Beep
CLK,DATA,ST.
CLK,DATA
Line in Line in Line in
Line out
Beep
Beep
VC1/VC2
AF Line SW
AFinst. Hook/PTT
UN-Lock
UN-Lock
RX inst.
CLK/DATA/RX ST CLK/DATA/RX ST
(Distress Watch Receiver)
(Routine Watch Receiver)
0dBm
0dBm
RX SW
AF Line sw
RX ST.
DAC ST.
Beep off cont.
ST-BY/RX mute/TX key
(ST-BY/RX mute/TX key)
Dimm/Alm /Alert
LCD 8bit DATA
LCD Cont.
Keyboard cont.
Printer cont,
8bit DATA
IEC1162-1 (NMEA)
Incomming IND. Distress Button
PANEL P.C.B
Printer
NBDP/PC
RT DMC/PC
RT BK CONT.
AF P.C.B
RX P.C.B
RX P.C.B
(General Watch RCV.)
(Distress Watch RCV.)
U11
U13 U12
Y2
Y1
+15V
U16
U1
U2
(MB91101)
U3
U4 U6,7
S1
U5 U15 U21
Q1
Q2-6
U40,41
U22
U24
U49
U45,46
U51
U50
Q25-27
U50
U58 U57 U56
CR42 CR41
U55
S2,3,4,5 U23,24
U5(EEPROM):AT28C256-20PC U4(Flash ROM):MBM29F800T