Hytera PT580 - PT580 F5 Schematic Diagram (Main Board_FPGA)

1 2 3 4 5 6 78
A
B
C
D
8
7654321
D
C
B
A
RX RF IN
1
GND1
2
VPD
3
GND2
5
RF OUT
4
U5001
2 5
1 3 4 6
Z5001
2 5
1 3 4 6
Z5002
1 2
3
D5001
R5001
C5003C5002 C5006
C5001
C5004
C5005
L5001
3V_RX
3V_RX
RF
1
GND
2
LOIN
3
IF
6
GND
5
VDD
4
U5002
C5018
L5002
C5017
L5007
C5019
R5010
RX_LO1
C5012
C5015C5014
C5016
L5006
R5007 R5009
R5008
C5007
L5003
C5022 L5004
C5020
L5008
C5021
3V_RX
1 3
2 Q5001
C5049
L5009
R5002
R5011
L5010
C5008
R5003
L5005
R5005
C5011
R5004
3V_RX
C5009
C5010
C5036
L5015
LOIP
1
VPOS1
2
IOPN
3
IOPP
4
VCMO
5
IAIN
6
COM3
7
IMXO
8
COM2
9
IF IN
10
IF IP
11
VPOS2
12
IOFS
13
VREF
14
ENBL
15
QOFS
16
VGIN
17
MXIP
18
MXIN
19
VPOS3
20
QMXO
21
COM3
22
QAIN
23
ENVG
24
QOPP
25
QOPN
26
COM1
27
LOIN
28
U5005
C5043
C5045C5044C5042C5041
R5020
R5019
R5012 R5014
R5013
C5029
C5026
C5024
C5027C5025
3V_RX
3V_RX
C5047
R5016
C5035
C5046
C5031
R5015
R5018
C5034
R5017
3V_RX
RX_I-
RX_I+
AGC
RX_Q+
RX_Q-
C5032
C5028
C5033
C5030
L5012L5011
L5013
RX_LO2
3V_RVCO
R5006
L5016
GND
3
Iout
2
V
5
V
4
1
U5003
TP5001
TP5002
C5048
1
2 3
4
5
6
U5006
200󱂜ྚ@73MHz
C5023
L5014
C5038 C5040
C5039
C5037 C5050
1
2 4 5 6
3
Z5003
C5051
PT580 F5 MAIN BOARD SCH(RF_RX)
PT580 F5 Schematic Diagram (Main Board_RF RX)
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