Hytera PT580 - PT580 F5 Schematic Diagram (Main Board_Cpu Clock)

1 2 3 4 5 6 78
A
B
C
D
8
7654321
D
C
B
A
3V3D
3V3D
/RESET
/RST_OUT
TDO
/TRST
TMS
TDI
TCK
RTCK
EMU0
EMU1
4
5
2
3
1
U2002
1V6D
C2024
12MHz_CLK
12MHz_CPU
12MHz_CPU
TO CLOCK
32K_CLK
1V6D
R2019
R2018
R2016
R2011
3V3D
R2012
R2013
FP_IO1
FP_IO2
FP_IO3
C2001 C2002 C2003 C2004
C2005
C2006 C2007 C2008
1V6D
C2009
C2010
C2011
1V6D
1V6D
C2012 C2013 C2014 C2015
C2016 C2017 C2018
3V3D
C2019
C2020
C2021 C2022
1V8D
C2023
R2001
R2002
1V6D
3V3D
R2008
CVDD
A15
CVDD
M2
CVDD
Y9
CVDD
Y20
CVDD1
AA3
CVDD2
A3
CVDD2
A9
CVDD2
E2
CVDD3
B13
CVDD3
B20
CVDD3
J21
CVDD3
R20
CVDDA
Y21
CVDDDLL
A11
CVDDRTC
W12
DVDD1
A19
DVDD1
E21
DVDD2
AA2
DVDD3
Y7
DVDD4
A5
DVDD4
A7
DVDD4
B10
DVDD4
B14
DVDD5
C2
DVDD5
H2
DVDD5
R1
DVDD6
AA11
DVDD7
Y16
DVDD8
L21
DVDD9
U21
DVDDRTC
V12
LDO.FILTER
J1
Vss
A13
Vss
A21
Vss
B1
Vss
B5
Vss
B7
Vss
B16
Vss
F20
Vss
G1
Vss
K2
Vss
K20
Vss
N1
Vss
P12
Vss
R21
Vss
U2
Vss
W20
Vss
Y3
Vss
Y13
Vss
AA1
Vss
AA7
Vss
AA21
Vcore
Vmpu
Vdsp
Vapll
Vddr
Vrtc
Vrtcio
Vio
Vflashio
Vsdram
GND
U2001A
TDO
AA19
TRST
Y18
TMS
V17
TDI
Y19
TCK
W18
RTCK
Y17
EMU0
V16
EMU1
W17
CLK32K_IN
P13
OSC32K_IN
V13
OSC32K_OUT
AA13
OSC1_IN
Y2
OSC1_OUT
W3
MCLK/MMC2.DATDIR0/GPIO24
V5
MCLKREQ/EXT_MASTER_REQ/UART2.RX/MMC2.DAT3/GPIO23
R10
CLOCK
PWRON_RESET
R12
MPU_RST/MPUIO14
U20
RST_OUT/GPIO41
AA20
RESET
JTAG
MPU_BOOT/USB1.SUSP
J20
RTC_ON_NOFF
Y12
CONF
V18
GPIO13/KB.R[5]/LCD.BLUE0
N19
IO
U2001B
C2026 C2025
PT580 F5 MAIN BOARD SCH.(CPU_CLOCK)
PT580 F5 Schematic Diagram (Main Board_CPU Clock)
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