S
MART
AXIS P
RO
/L
ITE
U
SER
'
S
M
ANUAL
FT9Y-B1378 7-3
7: D
EVICE
A
DDRESSES
M8055
High-speed Counter (Group 4/I5)
Comparison Output Reset Cleared Cleared Read/Write X X
*
M8056 Gate Input Maintained Cleared Read/Write X X
*
M8057 Reset Input Maintained Cleared Read/Write X X
*
M8060 Comparison ON Status Maintained Cleared Read X X
M8061 Overflow Maintained Cleared Read X X
M8062-
M8067
— Reserved —
M8070 Interrupt Input I0 Status
(ON: Allowed, OFF:
Prohibited)
Cleared Cleared Read X
M8071 Interrupt Input I2 Status Cleared Cleared Read X
M8072 Interrupt Input I3 Status Cleared Cleared Read X
M8073 Interrupt Input I5 Status Cleared Cleared Read X
M8074 Interrupt Input I6 Status Cleared Cleared Read X
M8075 Interrupt Input I7 Status Cleared Cleared Read X
M8076 SD Memory Card Access Stop Flag Operating Cleared Write X X
M8077 — Reserved —
M8080 Interrupt Input I0 Edge
(ON: Rising, OFF: Falling)
Cleared Cleared Read X
M8081 Interrupt Input I2 Edge Cleared Cleared Read X
M8082 Interrupt Input I3 Edge Cleared Cleared Read X
M8083 Interrupt Input I5 Edge Cleared Cleared Read X
M8084 Interrupt Input I6 Edge Cleared Cleared Read X
M8085 Interrupt Input I7 Edge Cleared Cleared Read X
M8086
M8087
— Reserved —
M8090
Catch Input ON/OFF Status
Group 1/I0 Maintained Cleared Read X X
M8091 Group 2/I2 Maintained Cleared Read X X
M8092 Group 3/I3 Maintained Cleared Read X X
M8093 Group 4/I5 Maintained Cleared Read X X
M8094 Group 5/I6 Maintained Cleared Read X X
M8095 Group 6/I7 Maintained Cleared Read X X
M8096
M8097
— Reserved —
M8100
User Communication
Receive Instruction Cancel
Flag
Connection 1 Cleared Cleared Write X
M8101 Connection 2 Cleared Cleared Write X
M8102 Connection 3 Cleared Cleared Write X
M8103-
M8107
— Reserved —
M8110
Connection Status
Connection 1
(ON: Connected, OFF: Not
Connected)
Operating Cleared Read X X
M8111
Connection 2
(ON: Connected, OFF: Not
Connected)
Operating Cleared Read X X
M8112
Connection 3
(ON: Connected, OFF: Not
Connected)
Operating Cleared Read X X
M8113-
M8117
— Reserved —
M8120 Initialize Pulse Cleared Cleared Read X X
M8121 1-sec Clock Operating Cleared Read X X
M8122 100-ms Clock Operating Cleared Read X X
M8123 10-ms Clock Operating Cleared Read X X
M8124 Timer/Counter Preset Value Changed Maintained Cleared Read X X
M8125 In-operation Output Cleared Cleared Read X X
M8126
M8127
— Reserved —
Device
Address
Description
CPU
Stopped
Power
OFF
Read/
Write
Ladder FBD