page 19
The block circuit diagram shows:
•
Short-circuit detection (overload) is possible via the input
channel. When the output is switched the LOW (logic 0) can
be read in.
The output transistor automatically switches off in the case of
a short circuit/overload. For safety reasons it does not switch
on again automatically. Therefore it has to be switched off
and then switched on again.
•
Wire-break detection is possible via the input channel. When
the output is blocked HIGH (logic 1) is read in as the resistor
R
i
pulls the output to HIGH potential (VBB). Without the wire
break the low-resistance load (R
L
< 10 k
Ω)
would force
(logic 0) LOW.
3.2. Fast inputs
In the controller modules the standard unit configurations have
an input frequency up to 50 kHz via 8 fast count/pulse inputs. If
e.g. mechanical switches are connected to these inputs, contact
bouncing might cause wrong signals in the controller. These
"error signals" have to be filtered out with the application
software, if required (see example program).
3.3. The software control configuration
For each hardware configuration the corresponding software
control configuration has to be loaded in the programming
system. For the programming system it represents the interface
to the hardware.
The software control configuration also provides the user with all
important system and error flags. Depending on the application
program they have to be processed and evaluated. They can be
accessed with their symbolic names or the IEC addresses.
3.4. Wiring
The wiring shown in the annex describes the standard unit
configurations. The wiring helps to assign the input and output
channels to the IEC 1131 addresses and the unit terminals.
To Next Page
Loading...
Need help?
General
