Technical Reference
63
2.8.2.3 Add-in Board and Peripheral Interface Connectors
Figure 11 shows the location of the add-in board connector and peripheral connectors. Note the
following considerations for the PCI bus connectors:
• All of the PCI bus connectors are bus master capable.
• PCI bus connector 2 has SMBus signals routed to it. This enables PCI bus add-in boards with
SMBus support to access sensor data on the board. The specific SMBus signals are as follows:
The SMBus clock line is connected to pin A40
The SMBus data line is connected to pin A41
OM10045
1
2
33
34
H
1
240
39
1
240
39
IJ
A B C D E FG
Item Description Reference Designator For more information see:
A Communication and networking riser (CNR) J3A1 Table 39
B PCI bus connector 5 J4A1 Table 40
C PCI bus connector 4 J4B1 Table 40
D PCI bus connector 3 J4C1 Table 40
E PCI bus connector 2 J4D1 Table 40
F PCI bus connector 1 J4E1 Table 40
G AGP universal connector J5E1 Table 41
H Diskette drive J8G3 Table 42
I Primary IDE J8G2 Table 43
J Secondary IDE J8G1 Table 43
Figure 11. Add-in Board and Peripheral Interface Connectors
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