Intel P8700 - Core 2 Duo Processor - AGTL+ Signal Group DC Specifications

Electrical Specifications
48 Datasheet
NOTES:
1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2. V
IL
is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low
value.
3. V
IH
is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high
value.
4. V
IH
and V
OH
may experience excursions above V
CCP
. However, input signal drivers must comply with the
signal quality specifications.
5. This is the pulldown driver resistance. Measured at 0.31*V
CCP
. R
ON
(min) = 0.418*R
TT
, R
ON
(typ) =
0.455*R
TT
,
R
ON
(max) = 0.527*R
TT
. R
TT
typical value of 55 Ω is used for R
ON
typ/min/max calculations.
6. GTLREF should be generated from V
CCP
with a 1% tolerance resistor divider. The V
CCP
referred to in these
specifications is the instantaneous V
CCP
.
7. R
TT
is the on-die termination resistance measured at V
OL
of the AGTL+ output driver. Measured at
0.31*V
CCP
. R
TT
is connected to V
CCP
on die. Refer to processor I/O buffer models for I/V characteristics.
8. Specified with on-die R
TT
and R
ON
turned off. Vin between 0 and V
CCP
.
9. Cpad includes die capacitance only. No package parasitics are included.
10. This is the external resistor on the comp pins.
11. On-die termination resistance, measured at 0.33*V
CCP
.
12. Applies to Signals A[35:3].
13. Applies to Signals D[63:0].
14. Applies to Signals BPRI#, DEFER#, PREQ#, PREST#, RS[2:0]#, TRDY#, ADS#, BNR#, BPM[3:0], BR0#,
DBSY#, DRDY#, HIT#, HITM#, LOCK#, PRDY#, DPWR#, DSTB[1:0]#, DSTBP[3:0] and DSTBN[3:0]#.
Table 13. AGTL+ Signal Group DC Specifications
Symbol Parameter Min Typ Max Unit Notes
1
V
CCP
I/O Voltage 1.00 1.05 1.10 V
GTLREF Reference Voltage 0.65 0.70 0.72 V 6
R
COMP
Compensation Resistor 27.23 27.5 27.78 Ω 10
R
ODT/A
Termination Resistor Address 49 55 63 Ω 11, 12
R
ODT/D
Termination Resistor Data 49 55 63 Ω 11, 13
R
ODT/Cntrl
Termination Resistor Control 49 55 63 Ω 11, 14
V
IH
Input High Voltage 0.82 1.05 1.20 V 3,6
V
IL
Input Low Voltage -0.10 0 0.55 V 2,4
V
OH
Output High Voltage 0.90 V
CCP
1.10 V 6
R
TT/A
Termination Resistance Address 50 55 61 Ω 7, 12
R
TT/D
Termination Resistance Data 50 55 61 Ω 7, 13
R
TT/Cntrl
Termination Resistance Control 50 55 61 Ω 7, 14
R
ON/A
Buffer On Resistance Address 23 25 29 Ω 5, 12
R
ON/D
Buffer On Resistance Data 23 25 29 Ω 5, 13
R
ON/Cntrl
Buffer On Resistance Control 23 25 29 Ω 5, 14
I
LI
Input Leakage Current — — ± 100 µA 8
Cpad Pad Capacitance 1.80 2.30 2.75 pF 9