Intel P8700 - Core 2 Duo Processor - Page 76

Package Mechanical Specifications and Pin Information
76 Datasheet
F2 VSS Power/Other
F3 RS[0]# Common Clock Input
F4 RS[1]# Common Clock Input
F5 VSS Power/Other
F6 RSVD Reserved
F7 VCC Power/Other
F8 VSS Power/Other
F9 VCC Power/Other
F10 VCC Power/Other
F11 VSS Power/Other
F12 VCC Power/Other
F13 VSS Power/Other
F14 VCC Power/Other
F15 VCC Power/Other
F16 VSS Power/Other
F17 VCC Power/Other
F18 VCC Power/Other
F19 VSS Power/Other
F20 VCC Power/Other
F21 DRDY# Common Clock
Input/
Output
F22 VSS Power/Other
F23 D[4]# Source Synch
Input/
Output
F24 D[1]# Source Synch
Input/
Output
F25 VSS Power/Other
F26 D[13]# Source Synch
Input/
Output
G1 VSS Power/Other
G2 TRDY# Common Clock Input
G3 RS[2]# Common Clock Input
G4 VSS Power/Other
G5 BPRI# Common Clock Input
G6 HIT# Common Clock
Input/
Output
G21 VCCP Power/Other
G22 D[3]# Source Synch
Input/
Output
G23 VSS Power/Other
G24 D[9]# Source Synch
Input/
Output
Table 17. Pin # Listing
Pin # Pin Name
Signal Buffer
Type
Directi
on
G25 D[5]# Source Synch
Input/
Output
G26 VSS Power/Other
H1 ADS# Common Clock
Input/
Output
H2 REQ[1]# Source Synch
Input/
Output
H3 VSS Power/Other
H4 LOCK# Common Clock
Input/
Output
H5 DEFER# Common Clock Input
H6 VSS Power/Other
H21 VSS Power/Other
H22 D[12]# Source Synch
Input/
Output
H23 D[15]# Source Synch
Input/
Output
H24 VSS Power/Other
H25 DINV[0]# Source Synch
Input/
Output
H26
DSTBP[0]
#
Source Synch
Input/
Output
J1 A[9]# Source Synch
Input/
Output
J2 VSS Power/Other
J3 REQ[3]# Source Synch
Input/
Output
J4 A[3]# Source Synch
Input/
Output
J5 VSS Power/Other
J6 VCCP Power/Other
J21 VCCP Power/Other
J22 VSS Power/Other
J23 D[11]# Source Synch
Input/
Output
J24 D[10]# Source Synch
Input/
Output
J25 VSS Power/Other
J26
DSTBN[0]
#
Source Synch
Input/
Output
K1 VSS Power/Other
K2 REQ[2]# Source Synch
Input/
Output
Table 17. Pin # Listing
Pin # Pin Name
Signal Buffer
Type
Directi
on