Intel Quad-Core Xeon - Page 73

Quad-Core Intel® Xeon® Processor 5300 Series Datasheet 75
Land Listing
F11 D23# Source Sync Input/Output
F12 D24# Source Sync Input/Output
F13 VSS Power/Other
F14 D28# Source Sync Input/Output
F15 D30# Source Sync Input/Output
F16 VSS Power/Other
F17 D37# Source Sync Input/Output
F18 D38# Source Sync Input/Output
F19 VSS Power/Other
F2 GTLREF_ADD_MID Power/Other Input
F20 D41# Source Sync Input/Output
F21 D43# Source Sync Input/Output
F22 VSS Power/Other
F23 RESERVED
F24 TESTHI07 Power/Other Input
F25 TESTHI02 Power/Other Input
F26 TESTHI00 Power/Other Input
F27 VTT_SEL Power/Other Output
F28 BCLK0 Clk Input
F29 RESERVED
F3 BR0# Common Clk Input/Output
F30 VTT Power/Other
F4 VSS Power/Other
F5 RS1# Common Clk Input
F6 RESERVED
F7 VSS Power/Other
F8 D17# Source Sync Input/Output
F9 D18# Source Sync Input/Output
G1 BPMb0# Power/Other Input/Output
G10 GTLREF_ADD_END Power/Other Input
G11 DBI1# Source Sync Input/Output
G12 DSTBN1# Source Sync Input/Output
G13 D27# Source Sync Input/Output
G14 D29# Source Sync Input/Output
G15 D31# Source Sync Input/Output
G16 D32# Source Sync Input/Output
G17 D36# Source Sync Input/Output
G18 D35# Source Sync Input/Output
G19 DSTBP2# Source Sync Input/Output
G2 COMP2 Power/Other Input
Table 4-2. Land Listing by Land Number
(Sheet 13 of 20)
Pin
No.
Pin Name
Signal
Buffer Type
Direction
G20 DSTBN2# Source Sync Input/Output
G21 D44# Source Sync Input/Output
G22 D47# Source Sync Input/Output
G23 RESET# Common Clk Input
G24 TESTHI06 Power/Other Input
G25 TESTHI03 Power/Other Input
G26 TESTHI05 Power/Other Input
G27 TESTHI04 Power/Other Input
G28 BCLK1 Clk Input
G29 BSEL0 CMOS
Asynchronous
Output
G3 BPMb3# Common Clk Input/Output
G30 BSEL2 CMOS
Asynchronous
Output
G4 BPMb2# Common Clk Output
G5 PECI Power/Other Input/Output
G6 RESERVED
G7 DEFER# Common Clk Input
G8 BPRI# Common Clk Input
G9 D16# Source Sync Input/Output
H1 GTLREF_DATA_END Power/Other Input
H10 VSS Power/Other
H11 VSS Power/Other
H12 VSS Power/Other
H13 VSS Power/Other
H14 VSS Power/Other
H15 DP1# Common Clk Input/Output
H16 DP2# Common Clk Input/Output
H17 VSS Power/Other
H18 VSS Power/Other
H19 VSS Power/Other
H2 GTLREF_DATA_MID Power/Other Input
H20 VSS Power/Other
H21 VSS Power/Other
H22 VSS Power/Other
H23 VSS Power/Other
H24 VSS Power/Other
H25 VSS Power/Other
H26 VSS Power/Other
H27 VSS Power/Other
H28 VSS Power/Other
Table 4-2. Land Listing by Land Number
(Sheet 14 of 20)
Pin
No.
Pin Name
Signal
Buffer Type
Direction