Reference Number: 327043-001 107
Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
TxL0P_POWER_CYCLES
• Title: Cycles in L0p
• Category: POWER_TX Events
• Event Code: 0x0D
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Number of Intel® QPI qfclk cycles spent in L0p power mode. L0p is a mode where we
disable 1/2 of the Intel® QPI lanes, decreasing our bandwidth in order to save power. It increases
snoop and data transfer latencies and decreases overall bandwidth. This mode can be very useful
in NUMA optimized workloads that largely only utilize Intel® QPI for snoops and their responses.
Use edge detect to count the number of instances when the Intel® QPI link entered L0p. Link
power states are per link and per direction, so for example the Tx direction could be in one state
while Rx was in another.
• NOTE: Using .edge_det to count transitions does not function if L1_POWER_CYCLES
TxL0_POWER_CYCLES
• Title: Cycles in L0
• Category: POWER_TX Events
• Event Code: 0x0C
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Number of Intel® QPI qfclk cycles spent in L0 power mode in the Link Layer. L0 is the
default mode which provides the highest performance with the most power. Use edge detect to
count the number of instances that the link entered L0. Link power states are per link and per
direction, so for example the Tx direction could be in one state while Rx was in another. The phy
layer sometimes leaves L0 for training, which will not be captured by this event.
TxL_BYPASSED
• Title: Tx Flit Buffer Bypassed
• Category: TXQ Events
• Event Code: 0x05
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Counts the number of times that an incoming flit was able to bypass the Tx flit buffer
and pass directly out the Intel® QPI Link. Generally, when data is transmitted across Intel® QPI, it
will bypass the TxQ and pass directly to the link. However, the TxQ will be used with L0p and when
LLR occurs, increasing latency to transfer out to the link.
TxL_CYCLES_NE
• Title: Tx Flit Buffer Cycles not Empty
• Category: TXQ Events
• Event Code: 0x06
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Counts the number of cycles when the TxQ is not empty. Generally, when data is trans-
mitted across Intel® QPI, it will bypass the TxQ and pass directly to the link. However, the TxQ will
be used with L0p and when LLR occurs, increasing latency to transfer out to the link.
TxL_FLITS_G0
• Title: Flits Transferred - Group 0
• Category: FLITS_TX Events
• Event Code: 0x00
• Max. Inc/Cyc: 2, Register Restrictions: 0-3
• Definition: Counts the number of flits transmitted across the Intel® QPI Link. It includes filters for
Idle, protocol, and Data Flits. Each "flit" is made up of 80 bits of information (in addition to some
ECC data). In full-width (L0) mode, flits are made up of four "fits", each of which contains 20 bits
of data (along with some additional ECC data). In half-width (L0p) mode, the fits are only 10 bits,
and therefore it takes twice as many fits to transmit a flit. When one talks about Intel® QPI
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