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Intel Xeon E5-2600 Series - Page 39

Intel Xeon E5-2600 Series
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Reference Number: 327043-001 39
Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
RxR_EXT_STARVED
• Title: Ingress Arbiter Blocking Cycles
• Category: INGRESS Events
• Event Code: 0x12
• Max. Inc/Cyc: 1, Register Restrictions: 0-1
• Definition: Counts cycles in external starvation. This occurs when one of the ingress queues is
being starved by the other queues.
RxR_INSERTS
• Title: Ingress Allocations
• Category: INGRESS Events
• Event Code: 0x13
• Max. Inc/Cyc: 1, Register Restrictions: 0-1
• Definition: Counts number of allocations per cycle into the specified Ingress queue.
• NOTE: IRQ_REJECTED should not be Ored with the other umasks.
RxR_IPQ_RETRY
• Title: Probe Queue Retries
• Category: INGRESS_RETRY Events
• Event Code: 0x31
• Max. Inc/Cyc: 1, Register Restrictions: 0-1
• Definition: Number of times a snoop (probe) request had to retry. Filters exist to cover some of
the common cases retries.
Table 2-24. Unit Masks for RxR_EXT_STARVED
Extension
umask
[15:8]
Description
IRQ bxxxxxxx1 IPQ:
IRQ is externally starved and therefore we are blocking the IPQ.
IPQ bxxxxxx1x IRQ:
IPQ is externally startved and therefore we are blocking the IRQ.
ISMQ bxxxxx1xx ISMQ:
ISMQ is externally starved and therefore we are blocking both IRQ
and IPQ.
ISMQ_BIDS bxxxx1xxx ISMQ_BID:
Number of times that the ISMQ Bid.
Table 2-25. Unit Masks for RxR_INSERTS
Extension
umask
[15:8]
Description
IRQ bxxxxxxx1 IRQ
IRQ_REJECTED bxxxxxx1x IRQ Rejected
IPQ bxxxxx1xx IPQ
VFIFO bxxx1xxxx VFIFO:
Counts the number of allocations into the IRQ Ordering FIFO. In JKT,
it is necessary to keep IO requests in order. Therefore, they are
allocated into an ordering FIFO that sits next to the IRQ, and must be
satisfied from the FIFO in order (with respect to each other). This
event, in conjunction with the Occupancy Accumulator event, can be
used to calculate average lifetime in the FIFO. Transactions are
allocated into the FIFO as soon as they enter the Cachebo (and the
IRQ) and are deallocated from the FIFO as soon as they are
deallocated from the IRQ.

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