Reference Number: 327043-001 77
Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
• Core State Transitions - there are a larger number of events provided to track when cores
transition C-state, when the enter/exit specific C-states, when they receive a C-state demotion,
etc.
• Frequency/Voltage Banding - ability to measure the number of cycles the uncore was operating
within a frequency or voltage ‘band’ that can be specified in a seperate filter register.
Note: Given the nature of many of the PCU events, a great deal of additional information can
be measured by setting the .edge_det bit. By doing so, an event such as “Cycles
Changing Frequency” becomes “Number of Frequency Transitions.
On Occupancy Events:
Because it is not possible to "sync" the PCU occupancy counters by employing tricks such as bus lock
before the events start incrementing, the PCU has provided fixed occupancy counters to track the
major queues.
1. Cores in C0 (4 bits)
2. Cores in C3 (4 bits)
3. Cores in C6 (4 bits)
Some Examples for Unlocking More Advanced Features:
The PCU perfmon implementation/programming is more complicated than many of the other units. As
such, it is best to describe how to use them with a couple examples.
• Case 1: Voltage Transtion Cycles (Simple Event)
• Case 2: Cores in C0 (Occupancy Accumulation)
• Case 3: Cycles w/ more than 4 cores in C0 (Occupancy Threshholding)
• Case 4: Transitions into more than 4 cores in C0 (Threshholding + Edge Detect)
• Case 5: Voltage Transition Cycles w/ > 4 Cores in C0
• Case 6: Cycles w/ <4 Cores in C0 and Freq < 2.0GHz
Table 2-80. PCU Configuration Examples
Case
Config 123456
EventSelect 0x03 0x00 0x00 0x00 0x03 0x0B
UseOccupancy 0x0 0x1 0x1 0x1 0x1 0x1
OccSelect 0x00 0x01 0x01 0x01 0x01 0x01
Threshhold 0x0 0x0 0x5 0x5 0x5 0x4
Invert 0x0 0x0 0x0 0x0 0x0 0x1
Edge Detect 0x0 0x0 0x0 0x0 0x0 0x0
OccInvert 0x0 0x0 0x0 0x0 0x0 0x1
OccEdgeDetect 0x0 0x0 0x0 0x1 0x0 0x0
Filter 0x00 0x00 0x00 0x00 0x00 0x14
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