Hardware Operations
2.5.2 DIMM Population Rule
For two slots per channel configurations, the Romley-EP platform requires DIMMs within a
channel to be populated starting with the DIMMs farthest from the processor in a “fill-farthest”
approach. In addition, when populating a Quad-rank DIMM with a Single- or Dual-rank DIMM
in the same channel, the Quad-rank DIMM must be populated farthest from the processor.
Intel MRC will check for correct DIMM placement. Additionally, Intel strongly recommends that
all designs follow the DIMM ordering, command clock, and control signal routing documented
in below figure. This addressing must be maintained to be compliant with the reference BIOS
code supplied by Intel. All allowed DIMM population configurations for two slots per channel
are shown in below tables.
When one DIMM is used, it must be populated in DIMM slot0 (farthest away from the CPU) of
a given channel.
A maximum of 8 logical ranks (ranks seen by the host) per channel is allowed.
When single, dual and quad rank DIMMs are populated for 2DPC, always populate the higher
number rank DIMM first (starting from the farthest slot), for example, first quad rank, then dual
rank, and last single rank DIMM.
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