Inventec B800 - Page 66

49
Signal Name
Pin
Pin
Signal Name
PE3_CPU0_SLOT2_TX_DP<7..0>
B14
A16
PE3_CPU0_SLOT2_RX_DP<7..0>
PE3_CPU0_SLOT2_TX_DP<7..0>
B19
A21
PE3_CPU0_SLOT2_RX_DP<7..0>
PE3_CPU0_SLOT2_TX_DP<7..0>
B23
A25
PE3_CPU0_SLOT2_RX_DP<7..0>
PE3_CPU0_SLOT2_TX_DP<7..0>
B27
A29
PE3_CPU0_SLOT2_RX_DP<7..0>
PE3_CPU0_SLOT2_TX_DP<7..0>
B33
A35
PE3_CPU0_SLOT2_RX_DP<7..0>
PE3_CPU0_SLOT2_TX_DP<7..0>
B37
A39
PE3_CPU0_SLOT2_RX_DP<7..0>
PE3_CPU0_SLOT2_TX_DP<7..0>
B41
A43
PE3_CPU0_SLOT2_RX_DP<7..0>
PE3_CPU0_SLOT2_TX_DP<7..0>
B45
A47
PE3_CPU0_SLOT2_RX_DP<7..0>
PE3_CPU0_SLOT2_TX_DN<7..0>
B15
A17
PE3_CPU0_SLOT2_RX_DN<7..0>
PE3_CPU0_SLOT2_TX_DN<7..0>
B20
A22
PE3_CPU0_SLOT2_RX_DN<7..0>
PE3_CPU0_SLOT2_TX_DN<7..0>
B24
A26
PE3_CPU0_SLOT2_RX_DN<7..0>
PE3_CPU0_SLOT2_TX_DN<7..0>
B28
A30
PE3_CPU0_SLOT2_RX_DN<7..0>
PE3_CPU0_SLOT2_TX_DN<7..0>
B34
A36
PE3_CPU0_SLOT2_RX_DN<7..0>
PE3_CPU0_SLOT2_TX_DN<7..0>
B38
A40
PE3_CPU0_SLOT2_RX_DN<7..0>
PE3_CPU0_SLOT2_TX_DN<7..0>
B42
A44
PE3_CPU0_SLOT2_RX_DN<7..0>
PE3_CPU0_SLOT2_TX_DN<7..0>
B46
A48
PE3_CPU0_SLOT2_RX_DN<7..0>
CLK_100M_PM_SLOT2_DP
A13
A1
Ground
CLK_100M_PM_SLOT2_DN
A14
B17
PE_SE_PRSNT_N
RST_PERST0_N
A11
B31
PE_SE_PRSNT_N
IRQ_LVC3_WAKE_N
B11
B48
PE_SE_PRSNT_N
I2C_SCL_PE_SLOT2
B5
A19
NC
I2C_SDA_PE_SLOT2
B6
A32
NC
PE_SLOT2_TDI
A6
A33
NC
PE_SLOT2_TCK
A5
B12
NC
PE_SLOT2_TMS
A8
B30
NC
PE_SLOT2_TRST_N
B9
A7
TP_PE_SLOT2_TDO