4 Theory of Operation
124 Keysight 34420A Service Guide
24-bit counter. The upper 16 bits of the count are captured by the SYNC input to
U500. The serial register is used to send and receive serial data bytes from the
main CPU to the 48 bit (6 × 8 bits) measurement configuration register (shown on
the schematic), or to communicate with the front panel processor. The serial
register is multiplexed to these two circuits. The transmission rate is selected to
1.5 M bits/second for the measurement configuration registers and to 93.75 k
bits/second for communication with the front panel processor. The general serial
interface is a 3-bit interface as shown below.
Serial data is received simultaneously as serial data is clocked out. The
measurement configuration readback data (SERRBK) is only checked during
self-test operation. Front panel data is exchanged in both directions whenever a
byte is sent from U501. The measurement configuration register data is strobed to
outputs by U500 signal SERSTB. Interrupts from the front panel are detected by
U501 and signaled to the processor by CHINT. The processor line FPINT signals
the front panel processor that U501 has data to send.
The meter's calibration correction data are stored in a 128 x 16 bit non-volatile
electrically erasable RAM, EERAM U505. The EERAM read/write data is accessed
by a 4-bit serial protocol controlled by U500.
The main processor has an on chip 10-bit successive approximation ADC. The
FLASH input is used to sample the residual charge on the main integrating ADC
output of U402.
The main CPU's pulse width modulated DAC outputs a O V to 5 V dc level after
filtering the 23 kHz output with R507 and C512. This level is used to adjust the
precharge amplifier offset voltage in U101B. Port bits are also configured to
detect the front/rear input switch position (FXRO) and to measure the input power
line frequency (LSENSE). Frequencies from 55 Hz to 66 Hz are measured as 60 Hz.
All other line input frequencies are assumed to be 50 Hz.
U501
Internal Signal
Measurement
Configuration Signals
Front Panel Signals
Serial Clock SERCK XFPSK
Data OUT (send) SERDATO FPDI
Data IN (receive) SERBK FPDO
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