KTD-00782-H KTQ45 family Page 60 of 92
6.6.1 Advanced settings – CPU Configuration
CPU Configure
Module Version: 3F.14
<-> Select Screen
|| Select Item
+- Change Option
F1 General Help
F10 Save and Exit
ESC Exit
Manufacturer:Intel
Intel® Core ™2 CPU Q9650 @ 3.0Ghz
Frequency : 3.00Ghz
FSB Speed : 1332Mhz
Cache L1 : 128 KB
Cache L2 : 12288 KB
Ratio Actual Value:9
C1E Support [Enabled]
Max CPUID Value Limit [Disabled]
Disable Bit Capability [Enabled]
Core Multi-Processing [Enabled]
PECI [Enabled]
Intel® SpeedStep™ tech [Enabled]
Intel® C-STATE tech [Enabled]
v02.61 (C)Copyright 1985-2006, American Megatrends, Inc.
If disabled and if “Intel® C-STATE tech” is disabled
then CPU always runs full speed.
Execute-Disable Bit Capability
When disabled, force the XD feature flag to always
return 0.
When disabled, disable one execution core of each
CPU die.
When enabled, enables PECI interface.
Disabled: Disable GV3
Enabled: Enable GV3
CState enabled: CPU idle is set to C2 C3 C4 State