98 cHAPTER 6: Computer Interface Operation
Model 336 Temperature Controller
6.2.4.4 Status Byte Register
The Status Byte register, typically referred to as the Status Byte, is a non-latching,
read-only register that contains all of the summary bits from the register sets. The
status of the summary bits are controlled from the register sets as explained in sec-
tion 6.2.4.1 to section 6.2.4.3. The Status Byte also contains the Request for Service
(RQS)/Master Summary Status (MSS) bit. This bit is used to control the Service
Request hardware line on the bus and to report if any of the summary bits are set via
the *STB? command. The status of the RQS/MSS bit is controlled by the summary bits
and the Service Request Enable Register.
6.2.4.5 Service Request Enable Register
The Service Request Enable Register determines which summary bits in the Status
Byte will set the RQS/MSS bit of the Status Byte. You may write to or read from the Ser-
vice Request Enable Register. Each Status Byte summary bit is logically ANDed to the
corresponding enable bit of the Service Request Enable Register. When you set a Ser-
vice Request Enable Register bit, and the corresponding summary bit is set in the Sta-
tus Byte, the RQS/MSS bit of the Status Byte will be set, which in turn sets the Service
Request hardware line on the bus.
6.2.4.6 Reading Registers
You can read any register in the status system using the appropriate query command.
Some registers clear when read, others do not (section 6.2.4.8). The response to a
query will be a decimal value that corresponds to the binary-weighted sum of all bits
in the register (TABLE 6-2). The actual query commands are described later through-
out section 6.2.4.
6.2.4.7 Programming Registers
The only registers that may be programmed by the user are the enable registers. All
other registers in the status system are read-only registers. To program an enable
register, send a decimal value that corresponds to the desired binary-weighted sum
of all bits in the register (TABLE 6-2). The actual commands are described throughout
(section 6.2.4).
Position B7 B6 B5 B4 B3 B2 B1 B0
Decimal 1286432168421
Weighting 2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
Example: If bits 0, 2, and 4 are set, a query of the register will return a decimal value of 21 (1+4+16).
TABLE 6-2 Binary weighting of an 8-bit register
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