A3-12 Issue 1 November 1998
363-208-011, Appendix 3
Test Head Installation
Figure 1-4. ARM Shelf DS1 Out/RT RMU Link J44
1
6
5
9
Wiring Side
3
J44
Note 2:
N/C = not used or required
for this application.
Data Set Ready (DSR) Input from RTH
Receive Input from RTH
Secondary BITS Clock DSX-1 Input (Tip)
Primary BITS Clock DSX-1 Input (Tip)
Transmit Output to RTH
Data Transmit Ready (DTR) Output to RTH
Secondary BITS Clock DSX-1 Input (Ring)
Primary BITS Clock DSX-1 Input (Ring)
Ground
Lead Designations
SLC
-2000
Lead Designations
SLC
-2000
Test Head
Test Head
CS
N/C
N/C
RTS
TD
DTR
DCD
RD
SG
Note 1:
The lead designations are shown for the
SLC
-2000 and the Test Head to show the
relationship between the lead designations
and their functional purpose.
COT
RTINVSEL
RTINVRDA
DS1TPOJ0144
DS1TPOJ0244
COT
DS1RGOJ0144
DS1RGOJ0244
RTINVTDA
RTINVCLK
GRD