Marantz SR9600 - Page 116

168
pin
No
Port Name
mode=7
I/O Use STBY Name Port
Setting
Note
107 P26/TIOCA5 I/O,I/O T_OUT I CEC_OUT L H CEC Output
108 P27/TIOCB5 I/O,I/O T_IN I CEC_IN - - CEC Input
109 P17/TIOCB2/TCLKD I/O,I/O,I/O O I CE_M L - Analog Switch/Volume NJM1157
110 P16/TIOCA2/~IRQ1 I/O,I/O,I INT I HDMI_MUTE H L MUTE INPUT FOR HDMI
111 P15/TIOCB1/TCLKC I/O,I/O,I/O O I _COMP_STB L H SHIFT REGISTER STROBE
112 P14/TIOCA1/~IRQ0 I/O,I/O,I O I V_RXD/TXD_SEL L L L:SEL_DL_RXD/TXD,
H:SEL_V_RXD/TXD(sr10)
113 P13/TIOCD0/TCLKB I/O,I/O,I/O O I _OSD_CE L H OSD CHIP ENABLE(only SR9600)
114 P12/TIOCC0/TCLKA I/O,I/O,I/O O I _512_256fs H H 1394 MASTER CLOCK SELECT
115 P11/TIOCB0 I/O,I/O O I _1394_BOOT L H _1394CPU_BOOT
116 P10/TIOCA0 I/O,I/O T_IN I VD_OUT H - Vsync Detect
117 Vss I YES I VSS - - GND
118 P2Vcc I YES I VCC - - +5V'
119 P37/TxD4 I/O,O SO I RXD_M-IF - - DATA OUT FOR IEEE1394 MODULE
120 P36/RxD4 I/O,I SI I TXD_M-IF - - DATA IN FROM IEEE1394 MODULE
121 P35/SCK1/SCK4/
SCL0/~IRQ5
I/O,I/O,I/O,I/O,I SC I CPU_SCL - - Main/MRAC CPU I/F CLK
122 P34/RxD1/SDA0 I/O,I,I/O SIO I CPU_SDA - - Main/MRAC CPU I/F DATA
123 P33/TxD1/SCL1 I/O,O,I/O SC I V_SCL - - Video Conv CLK
124 P32/SCK0/
SDA1/~IRQ4
I/O,I/O,I/O,I SIO I V_SDA - - Video Conv DATA
125 P31/RxD0 I/O,I SI I V_RXD - - GUI CPU I/F (SH7709S) or WR(need PU)
(only SR-11S1)
126 P30/TxD0 I/O,O SO I V_TXD - - GUI CPU I/F (SH7709S) or WR(need PU)
(only SR-11S1)
127 P77/TxD3 I/O,O SO I RX1_TI - - DATA OUT FOR TI DSP
128 P76/RxD3 I/O,I SI I DX1_TI - - DATA IN FROM TI DSP
129 P75/TMO3/SCK3 I/O,I/O,I/O SC I CLKX_1_TI - - SERIAL CLOCK OUT FOR TI DSP
130 P74/TMO2/~MRES I/O,O O O V_STB - - SHIFT REGISTER STROBE
131 P73/TMO1 I/O,O O O V_CLK - - Video SHIFT REGISTER CLOCK
132 P72/TMO0 I/O,O O O V_DATA - - Video SHIFT REGISTER DATA
133 P71/TMRI23/TMCI23 I/O,O,O O I _M_OSD_CE L H MULTI R OSD CHIP ENABLE
134 P70/TMRI01/TMCI01 I/O,O,O O O 5VL_SW H - 5VL SWITCH
135 PG4 I/O O I FSX1_TI L - CE OUT FOR TI DSP
136 PG3 I/O O I RES_TI L H RESET OUT FOR TI DSP
137 PG2 I/O O I _RST_SBDAC L L SURROUND BACK DAC RESET
138 PG1/~IRQ7 I/O,I INT I DIR_INT L - DIR INT
139 PG0/~IRQ6 I/O,I INT I ERR_TI L - MUTE CONTROL IN FROM TI DSP
140 PE0 I/O I I RTS_M-IF - - RTS IN FROM 1394 MODULE
141 PE1 I/O O I CTS_M-IF - - CTS OUT FOR 1394 MODULE
142 PE2 I/O O I V_RTS - - RTS FOR VIDEO CPU
143 PE3 I/O I I V_CTS - - CTS FOR VIDEO CPU
144 PE4 I/O O I HDMI_AUD_SW H L AUDIO SW FOR HDMI
QU01 : HD64F2505FC26DV