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Mitsubishi Electric MELSEC iQ-R-R00CPU - Page 301

Mitsubishi Electric MELSEC iQ-R-R00CPU
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16 MULTIPLE CPU SYSTEM FUNCTION
16.4 Data Communication Between CPU Modules
299
16
Checking for the memory configuration
This section describes the CPU buffer memory configuration of each CPU No. The refresh setting can be configured in both
the CPU parameter and the window shown below. ( Page 308 Refresh settings)
[System Parameter] [Multiple CPU Setting] [Communication Setting between CPUs] [CPU Buffer Memory
Setting] [Detailed Setting]
Window
Displayed items
Item Description Setting range Default
[Set] button of each refresh area This menu item sets up the refresh settings used for data
communication between CPU modules. (The settings are linked
with the refresh settings of CPU parameter)
0 points
[Send/Receive Direction Display between
CPUs] button
Click the button and arrows that indicate the send/receive direction
appear.


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