Mitsubishi Electric MELSEC iQ-R-R00CPU - Page 78

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1 RUNNING A PROGRAM
1.7 Interrupt Program
■If an interrupt factor occurs in the STOP/PAUSE status
• For I0 to I15, I28 to I31, I48, I49, and I50 to I1023
The interrupt factor that has occurred is memorized, and the corresponding interrupt program will be executed when the CPU
module switches to the RUN state and the interrupt is enabled. Even if the same interrupt factor occurs multiple times before
switching to the RUN state, it will be memorized only once.
• For I45
The interrupt factor that has occurred is not memorized, and therefore the corresponding interrupt program will not be
executed even when the CPU module switches to the RUN state and the interrupt is enabled. The interrupt program will be
executed when the CPU module switches to the RUN state and then the first interrupt factor occurs.
• For I44
The interrupt factor that has occurred is not memorized, and therefore the corresponding interrupt program will not be
executed even when the CPU module switches to the RUN state and the interrupt is enabled. Instead, startup of interrupt is
prepared when the CPU module switches to the RUN state and the interrupt is enabled (the interrupt program will not be
executed upon occurrence of the first interrupt factor). Then, the interrupt program will be executed during the second cycle
after the switch to the RUN state.
(1) The second and following interrupt factors that occur while the CPU module is in the STOP state are not memorized.
(2) When interrupts are enabled by changing the operating status of the CPU module from STOP to RUN, interrupts are executed in order from I50 that has a
higher priority level.
(3) I100 is executed. (I50 is not executed for the second time.)
Mc: Multiple CPU synchronization cycle
(1) The interrupt is not executed.
(2) The interrupt is executed.
Sc: Inter-module synchronization cycle
(1) The interrupt is not executed.
(2) The interrupt is executed.
I100 I100I50 I50
STOP/PAUSE RUN
××
t
(1)
(2)
(3)
Main routine program
I50 interrupt program
CPU module
operating status
I100 interrupt program
Interrupts are disabled.
(DI)
EI execution
Interrupts are enabled.
(EI)
High
Priority level of
interrupt
Low
I45 I45 I45I45 I45 I45
STOP/PAUSE RUN
t
(1)
(2)
Mc Mc
(2)
Main routine program
I45 interrupt program
CPU module operating status
I44 I44 I44
STOP/PAUSE RUN
Sc Sc
t
(2)
(1)(1)
Main routine program
I44 interrupt program
CPU module operating status