NF DF 1906 - Status Byte Resister

5.5 Status System
DF1906
5-17
5.5.1 Status Byte Resister
Table 5-3 shows the definition of the status byte resister. The bits that are set to 1 are validated in the
service request enable register and the status byte register uses the logical OR of the valid bits to
generate a service request.
The status byte can be read by a serial poll or *STB? query.
Table 5-3 Definition of Status Byte Register
Bit
Weight
Description
7
128
Always 0 (unused)
RQS / MSS (6)
64
This is defined as RQS (Request Service) for serial poll and is
used to inform the controller whether or not the equipment has
generated a service request. When you perform serial poll, this bit
is cleared to 0.
This is defined as MSS (Master Status Summary) for *STB? query
and acts as the summary bit of the status byte. MSS is not cleared
until the cause of the valid bit is removed.
ESB (5)
32
ESB (Event Status Bit) acts as the summary bit of the standard
event status resistor. When any of the valid bits of the standard
event status resistor is set to 1, this is set to 1, and when all bits are
set to 0, this is cleared to 0.
M AV (4)
16
When a response to the query is written to the response message
queue and is ready for output, MAV (Message Available Bit) is set
to 1.
When the response message queue becomes empty, this is cleared
to 0.
3
8
Always 0 (unused)
2
4
Always 0 (unused)
1
2
Always 0 (unused)
0
1
Always 0 (unused)
■ About Checking Status when Making Query
Normally when you just receive a response message after sending a query command for a query, you
will be able to receive a response correctly. You do not necessarily need to check the MAV bit of the
status byte. When you proceed with the operation while checking the MAV bit, send a query
command, then perform serial poll to check that the MAV bit of the status byte is set to 1, then read
the response message and check that the MAV bit is set to 0, and then proceed to the next operation.