Panasonic TH-50PH9UK - C1-Board (1 of 2) Schematic Diagram

14.29. D-Board (2 of 2) Block Diagram
PCU1
LEU
PCU2
CLRU
CLKU0
CLKU3
CLKU1
CLKU2
LEU
CLRU
PCD1
CLKD0
SOS7_SC2
SOS6_SC1
CLKD1
LED
CLRD
SOS8_SS
ODEU-R
CLKU0
CLKU1
CLKU2
CLKU3
ODEU-L
CLKD3
CLKD3
CLKD2
CLRD
PCD2
LED
CLKD1
CLKD2
CLKD0
ODED-R
FREE_RUN
CLKM_IN
ODED_L
TP063
TP065
TP9402
TP066
X9500
B 10bit
st-r
IC9400
CONVERTER
XRST
CTI/TINT
WB-ADJ
I/P
CONVERTER
COLOR
FPCLK
FPDAT0
FPDAT1
XRST2
SFVRST
LATCH
CONTRAST
FORMAT
SFRST
Video DATA 36bit DA00-DC11<R>
FORMAT CONVERTER/RGB PROCESSOR<R>
IC9401
DATA
ROMDATA00-03 DA14,DA15-DC15<L>
DDR SDRAM<R>(128M)
PCK OCK
SUB-FIELD
PLASMA AI/SUB FIELD PROCESSOR/DATA DRIVER<R>
R 10bit
JTAG
DCK
R 10bit
ROMDATA04-15 UA12-UC15<L>
PLASMA AI
G 10bit
NEW
DRVCLKU0-U3,DRVCLKD0-D3
HD
G 10bit
B 10bit
VD
PROCESSOR
DRIVER
PD1-M<RIGHT>
B 10bit
st-r
IC9300
CONVERTER
XRST
CTI/TINT
WB-ADJ
I/P
CONVERTER
COLOR
FPCLK
FPDAT0
FPDAT1
XRST
SFVRST
LATCH
CONTRAST
FORMAT
SFRST
Video DATA 36bit DA00-DC11<L>
FORMAT CONVERTER/RGB PROCESSOR<L>
IC9301
DATA
ROMDATA00-03 DA14,DA15-DC15<L>
DDR SDRAM<L>(128M)
SUB-FIELD
PLASMA AI/SUB FIELD PROCESSOR/DATA DRIVER<L>
R 10bit
JTAG
DCK
R 10bit
ROMDATA04-15 UA12-UC15<L>
PLASMA AI
G 10bit
NEW
DRVCLKU0-U3,DRVCLKD0-D3
HD
G 10bit
B 10bit
VD
PROCESSOR
DRIVER
PD1-M<LEFT>
TO C21
PCU1
TO C31
16
P5V
80
5VDET
L-UP
R-UP
D31
12
19
14
10
9
P5V
ODEU
Q9301
PCU2
12bit UA08-UC11<L>
DOUTUC23
55
52
DOUTUA8
36
CLKU2-L
DOUTUA0
DOUTUC7
CLRU
CLKU3-L
52
50
P5V
48
1
ODEU
LEU
51
CLKU0-L
CLKU1-L
53
Q9302
5VDET
18
CLRU
47
21
4
D32
P5V
17
LEU
12
31
1
PCD1
TO C41
40
SCAN
2
45
5VDET
L-DOWN
DATA
43
SUSTAIN
37
42
1
9
DATA
P5V
SOS6-SC1
ODED
52
P5V
Q9400
46
SOS7-SC2
1
DOUTDA0
DOUTDC7
4
58
SOS8_SS
11
TO SC20
CLKD0-L
CLKD1-L
12
13
38
CLRD
20
D20
35
9
D33
P5V
P5V
39
LED
Video DATA 36bit UA00-UC11<L>
Video DATA 36bit UA00-UC11<R>
58
77
CLKU0-R
33
34
CLKU1-R
CLKU2-R
55
56
CLKU3-R
36bit UA00-UC11<R>
47
CLKD1-R
CLKD2-R
CLRD
CLKD3-L
31
71
72
P5V
1
69
R-DOWN
D34
29
DOUTDC23
TO C51
33
CLKD2-L
30
77
P5V
45
ODED-R
LED
4
23
CLKD3-R
80
36bit DA00-DC11<R>
CLKD0-R
50
48
28
Q9402
PCD2
5VDET
12bit DA08-DC11<L>
DOUTDA8
25
26
24bit UA00-UC07<L>
24bit DA00-DC07<L>
Q9401
IC9504
LEVEL CONVERTER
3.3V 5V
IC9505
LEVEL CONVERTER
3.3V 5V
IC9503
LEVEL CONVERTER
3.3V 5V
IC9802,03
3.3V 5V
LEVEL CONVERTER
CLOCK GENE.
CLK7
12
CLK5
CLK6
14
13
4
CLK9
XT
1
20
XTN
IC9200
IC9304
16M FLASH MEMORY
RESET
45
VOUTVCC
IC9602
RESET
P3.3V
DQ4-DQ15
A0-A19
DQ0-DQ3
IC9402
BUS
SWITCH
BUS SW
ODED-R,ODED-L,PCD1,PCD2,LED,CLRD
UMH,UML,USH,USL,UEH,NUEL,URH,URL
CL,CLK,SIU,SID,SCSU,CEL2,CPH,CEL,CBK,CSL,CSH,CML,CMH
Sustain Control DATA 8bit
Scan Control DATA 13bit
ODEU-R,ODEU-L,PCU1,PCU2,LEU,CLRU
PCK OCK
XCE-R
XCE-L
BYTE
XWE
XOE
R10-R19,G10-G19,B10-B19
UA05-UC12,UC13,UA15<L>
DA14,DA15-DC15<L>
UA12-UC12,UC13,UA15
UA05-UC11
DA14,DA15-DC15<L>
UA12-UC15<L>
UA05-UC10,UB11,UC11<L>
XCE-L
20MHz
84MHz
36.6MHz
60MHz
VD
HD
DCK
DISCHARGE CONTROL
BUS SW
JTAG
FLASH CONTROL
VD
HD
DCK
3
11
16
9
10
6
5
15
8
1
7
2
20
21
18
17
19
4
12
13
14
Control DATA(D)
Control DATA(U)
SS PULSE
SC PULSE
TD0,TD1,TMS,TCK
SOS9_C0NF
DRV_RST
SOS6,7,8
SUB-FIELD PROCESSOR
FORMAT CONVERTER
D
DIGITAL SIGNAL PROCESSOR
PLASMA AI
TH-50PH9UK
D-Board (2 of 2) Block Diagram
TH-50PH9UK
D-Board (2 of 2) Block Diagram
TH-50PH9UK
97