Rigol DG3000 Series

RIGOL
© 2008 RIGOL Technologies, Inc.
User‟s Guide for Logic Signal Output Module
5-2
Specifications
Public Specification
Digital voltage range
1.4～4.2V (Typical and user-defined) (except RS232)
Trigger mode
Auto, Burst mode trigger
Code pattern
All“0”、All“1”、“01”、Pseudo-random code、User data
User space
256k bytes online-edit, 2M bytes output (UltraWave)
PO
Analog voltage range
1.4～9.4V
CLK
C0、C1
Clock phase
0
0
、90
0
、180
0
、270
0
Data line
D0～D15
Transmission rate
1bps～100Mbps
Data output range
1Byte～128k Bytes
Mask Channel
None, D0～D15
Tri-state Channel
None, D0～D15
IIC
Analog voltage range
1.4～9.4V
Bit sequence
MSB
CLK
D0～D15
Data line
D0～D15
Transmission rate
1bps～15Mbps
Data output range
1Byte～10k Bytes
Optional output address
None、7bits address
Operation
Write, Read
SPI
Analog voltage range
1.4～9.4V
Bit sequence
MSB
CLK
D0～D15
Data line (SDA)
D0～D15
TFS
D0～D15
CS
D0～D15
Transmission rate
1bps～60Mbps
Data output range
1byte～40k bytes
SPI type
SPI2, SPI3
Clock polarity
0、1
Clock phase
0、1
CS level
High level、Low level
#Data
1～3Bytes
TFS
FS_H、FS_L、LD_H、LD_L or NONE
RS232
Analog voltage range
2.0V～4.5V -4.5V～-2.0V
Bit sequence
LSB