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SICK HIPERFACE DSL - DSL Master Function Register

SICK HIPERFACE DSL
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1 = The last answer to a long message was damaged.
0 = No error detected in the last answer to a long message.
Bit 3 FIX0: This bit always gives a "0". For SPI interfaces, this is used for checking the
spi_miso pin for stuck-at-'1' faults.
Bit 2 QMLW: Quality monitoring at Low level (see chapter 6.3.3)
1 = Current value of quality monitoring less than 14.
0 = Current value of quality monitoring greater than or equal to 14.
Bit 1 FREL: Channel status for “long message”.
1 = The channel for the “long message” is free.
0 = The channel for the “long message” is in use.
Bit 0 FRES: Channel status for the "short message". 1 = The channel for the "short message"
is free.
0 = The channel for the "short message" is in use.
6.3 DSL Master function register
The protocol logic controls the performance of the DSL Master via the registers in the
DSL Master IP Core on drive interface. These registers are also used for accessing the
position values.
The table below contains a list of all the function registers available in the IP Core.
NOTE
The addresses given below are referencing a big-endian addressing. For a table stating
the register addresses depending on the endianness, see chapter 9.5.
Table 20: Description of the registers in DSL Master, drive interface
Addr Designation Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value at reset
00h SYS_CTRL PRST MRST FRST LOOP PRDY SPPE SPOL OEN 0000 0000
01h SYNC_CTRL ES 0000 0001
03h MASTER_QM LINK - - -
Quality monitoring
0--- 0000
04h EVENT_H INT SUM SCE - POS VPOS DTE PRST 000- 0000
05h EVENT_L - - MIN ANS - QMLW FREL FRES --00 -000
06h MASK_H - MSUM MSCE - MPOS MVPOS MDTE MPRST -00- 0000
07h MASK_L - - MMIN MANS - MQMLW MFREL MFRES --00 -000
08h MASK_SUM MSUM7:0 0000 0000
09h EDGES Bit sampling pattern 0000 0000
0Ah DELAY RSSI Cable delay 0000 0000
0Bh VERSION Coding
IP Core version number
0101 0111
0Ch RELEASE Release date FIFO 0000 0000
0Dh ENC_ID2 - SCI ENC_ID19:16 -000 0000
0Eh ENC_ID1 ENC_ID15:8 0000 0000
0Fh ENC_ID0 ENC_ID7:0 0000 0000
10h POS4 Fast position, byte 4 0000 0000
11h POS3 Fast position, byte 3 0000 0000
12h POS2 Fast position, byte 2 0000 0000
6 REGISTER MAP
32
T E C H N I C A L I N F O R M A T I O N | HIPERFACE DSL
®
8017595/ZTW6/2018-01-15 | SICK
Subject to change without notice

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